Differences between TX2 module revisions

Hello,

I have two TX2 modules, one that i got with a dev kit PN: 135-0727-000 R3 and the other was bought recently as a standalone PN: 135-0807-000 R2.

I are seeing a difference in functionality between the two. We have customized jetpack to work with our carrier and it is working fine with the 135-0727-000 R3 module.
On the new module if i flash the exact same software i find that PCIe and USB 3.0 are not working at all.

What are the differences between the two module revisions and any thoughts on how to resolve this issue ?

Hi MGhias,
So the issue is still present even after applying the solution in
https://devtalk.nvidia.com/default/topic/1001443/jetson-tx2/extlinux-conf-fdt-no-longer-used-for-dtb-file-specification-/post/5130849/#5130849 ?

Yes even after applying the solution i do not see PCIe and USB3.0 on the new standalone module.

Hi MGhias,
Please apply the same to
tegra186-mb1-bct-pmic-quill-p3310-1000-c00.cfg
tegra186-mb1-bct-pmic-quill-p3310-1000-c01.cfg
tegra186-mb1-bct-pmic-quill-p3310-1000-c02.cfg
tegra186-mb1-bct-pmic-quill-p3310-1000-c04.cfg

and try again.

Hi Dane,

I applied your suggestion but still having the same issue.

I also see the following messages repeated in the dmesg log when i have a device plugged into the USB 3.0 port.

[  115.116571] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x6cc88d9
[  115.116595] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x2cc88d9
[  115.116615] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x2610100c
[  115.116631] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x26101008
[  115.507913] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x2cc88d9
[  115.507935] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x6cc88d9
[  115.507955] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x26101008
[  115.507971] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x2610100c
[  115.808482] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x6cc88d9
[  115.808503] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x2cc88d9
[  115.808522] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x2610100c
[  115.808538] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x26101008
[  116.003899] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x2cc88d9
[  116.003921] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x6cc88d9
[  116.003941] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x26101008
[  116.003956] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x2610100c
[  116.500495] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x6cc88d9
[  116.500515] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x2cc88d9
[  116.500533] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x2610100c
[  116.500548] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x26101008
[  116.747906] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x2cc88d9
[  116.747926] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x6cc88d9
[  116.747946] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x26101008
[  116.747961] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x2610100c
[  117.192414] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x6cc88d9
[  117.192434] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x2cc88d9
[  117.192452] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x2610100c
[  117.192468] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x26101008
[  117.491922] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x2cc88d9
[  117.491947] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x6cc88d9
[  117.491966] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x26101008
[  117.491982] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x2610100c
[  117.884366] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x6cc88d9
[  117.884389] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x2cc88d9
[  117.884410] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x2610100c
[  117.884427] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x26101008
[  118.235887] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x2cc88d9
[  118.235908] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x6cc88d9
[  118.235927] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x26101008
[  118.235943] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x2610100c
[  118.576483] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x6cc88d9
[  118.576504] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x2cc88d9
[  118.576526] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x2610100c
[  118.576541] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x26101008
[  118.979900] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x2cc88d9
[  118.979921] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x6cc88d9
[  118.979940] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x26101008
[  118.979955] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x2610100c
[  119.268575] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x6cc88d9
[  119.268597] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x2cc88d9
[  119.268617] tegra_phy_xusb_utmi_pad_power_on padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x2610100c
[  119.268633] tegra_phy_xusb_utmi_pad_power_on padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x26101008
[  119.475878] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) = 0x2cc88d9
[  119.475898] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL0(port)(@0xc8) with 0x6cc88d9
[  119.475916] tegra_phy_xusb_utmi_pad_power_down padctl_read XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) = 0x26101008
[  119.475931] tegra_phy_xusb_utmi_pad_power_down padctl_write XUSB_PADCTL_USB2_OTG_PADX_CTL1(port)(@0xcc) with 0x2610100c

Hi MGhias,
Do you remove the following part in all cfg and set [pmic.generic.1.block-count] to new value?

# 5V0_HDMI_EN
pmic.generic.1.block[2].type = 1; # I2C Type
pmic.generic.1.block[2].i2c-controller-id = 0;
pmic.generic.1.block[2].slave-add = 0xE8; # 7BIt:0x74
pmic.generic.1.block[2].reg-data-size = 8;
pmic.generic.1.block[2].reg-add-size = 8;
pmic.generic.1.block[2].block-delay = 10;
pmic.generic.1.block[2].count = 2;
pmic.generic.1.block[2].commands[0].0x07.0xFF = 0xEF;
pmic.generic.1.block[2].commands[1].0x03.0xFF = 0x10;

For c04.cfg, it should be

######################## #GENERIC RAIL  (ID = 1) DATA ###############
pmic.generic.1.block-count = 3;

# 1. Set PMIC MBLDP = 1, CNFGGLBL1 bit 6 = 1
pmic.generic.1.block[0].type = 1; # I2C Type
pmic.generic.1.block[0].i2c-controller-id = 4;
pmic.generic.1.block[0].slave-add = 0x78; # 7BIt:0x3c
pmic.generic.1.block[0].reg-data-size = 8;
pmic.generic.1.block[0].reg-add-size = 8;
pmic.generic.1.block[0].block-delay = 10;
pmic.generic.1.block[0].count = 1;
pmic.generic.1.block[0].commands[0].0x00.0x40 = 0x40;

# VDD_HDMI_DP_1V05 (LDO7) - Enable 1.0V
pmic.generic.1.block[1].type = 1; # I2C Type
pmic.generic.1.block[1].i2c-controller-id = 4;
pmic.generic.1.block[1].slave-add = 0x78; # 7BIt:0x3C
pmic.generic.1.block[1].reg-data-size = 8;
pmic.generic.1.block[1].reg-add-size = 8;
pmic.generic.1.block[1].block-delay = 10;
pmic.generic.1.block[1].count = 1;
pmic.generic.1.block[1].commands[0].0x31.0xFF = 0xC4;

# LDO3 and LDO5 to 5mv/us
# DVDD-PEX LDO8 enable and set to 1.0V
pmic.generic.1.block[2].type = 1; # I2C Type
pmic.generic.1.block[2].i2c-controller-id = 4;
pmic.generic.1.block[2].slave-add = 0x78; # 7BIt:0x3C
pmic.generic.1.block[2].reg-data-size = 8;
pmic.generic.1.block[2].reg-add-size = 8;
pmic.generic.1.block[2].block-delay = 10;
pmic.generic.1.block[2].count = 6;
pmic.generic.1.block[2].commands[0].0x2A.0x01 = 0x01; # SS_L3
pmic.generic.1.block[2].commands[1].0x2E.0x01 = 0x01; # SS_L5
pmic.generic.1.block[2].commands[2].0x34.0x01 = 0x01; # SS_L8
pmic.generic.1.block[2].commands[3].0x33.0xFF = 0xC4;
pmic.generic.1.block[2].commands[4].0x34.0xFE = 0xCA;
pmic.generic.1.block[2].commands[5].0x4E.0xFF = 0x61;

Thanks Dane, it’s working now. I was modifying the file under the wrong path.

I was modifying
Linux_for_Tegra_tx2/bootloader/tegra186-mb1-bct-pmic-quill-p3310-1000-c04.cfg

instead of
Linux_for_Tegra_tx2/bootloader/t186ref/BCT/tegra186-mb1-bct-pmic-quill-p3310-1000-c04.cfg

@DaneLLL

Hi DaneLLL,
I am using TX2 with custom carry board.

I try to use ODMDATA = 0x07090000; ,for my custom carry board has three USB3 and no PCIe.
But it seem the ODMDATA dont modify anything.
After i modify ODMDATA = 0x07090000; and the readout lane0…4 belong to as follow:

nvidia@tegra-ubuntu:~$ sudo devmem2 0x02520284 b
[sudo] password for nvidia: 
/dev/mem opened.
Memory mapped at address 0x7fa6b04000.
Value at address 0x2520284 (0x7fa6b04284): 0x0
nvidia@tegra-ubuntu:~$ sudo devmem2 0x02530284 b
/dev/mem opened.
Memory mapped at address 0x7f81c23000.
Value at address 0x2530284 (0x7f81c23284): 0x1
nvidia@tegra-ubuntu:~$ sudo devmem2 0x02540284 b
/dev/mem opened.
Memory mapped at address 0x7fb1dbe000.
Value at address 0x2540284 (0x7fb1dbe284): 0x1
nvidia@tegra-ubuntu:~$ sudo devmem2 0x02550284 b
/dev/mem opened.
Memory mapped at address 0x7f9c077000.
Value at address 0x2550284 (0x7f9c077284): 0x1
nvidia@tegra-ubuntu:~$ sudo devmem2 0x02560284 b
/dev/mem opened.
Memory mapped at address 0x7f8a79e000.
Value at address 0x2560284 (0x7f8a79e284): 0x1

I change ODMDATA to 0x06090000 or 0x07090000 in p2771-0000.conf.common file

process_board_version()
{
	local board_id="${1}";
	local board_version="${2}";
	local bdv=${board_version^^};
	local bid=${board_id^^};
	local uboot_build=500;
	local fromfab="-a00";
	local tofab="-c03";		# default = C03
	local pmicfab="-c00";		# default = C00
	local bpfdtbfab="-c00";		# default = C00
	local tbcdtbfab="-c03";		# default = C03
	local kerndtbfab="-c03";	# default = C03
	ODMDATA=0x6090000;		# default = C0X

	#
	# Board version is Alpah-Numeric value.
	#

then flash kernel as
sudo ./flash.sh -r -k kernel jetson-tx2 mmcblk0p1

i have modify a00-base.dtsi as

xhci@3530000 {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(2)>;
		phy-names = "utmi-0", "utmi-1", "utmi-2", "usb3-0", "usb3-1","usb3-2";
		nvidia,boost_cpu_freq = <800>;
	};

	pinctrl@3520000 {
		status = "okay";
		pinctrl-0 = <&tegra_xusb_padctl_pinmux_default>;
		pinctrl-names = "default";
		tegra_xusb_padctl_pinmux_default: pinmux {
			/* Quill does not support usb3-micro AB */
			usb2-expender-A {
				nvidia,lanes = "otg-0";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_OTG_CAP>;
				status = "okay";
			};
			tusb8041-usb2 {
				nvidia,lanes = "otg-1";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
			tusb8041-usb3 {
				nvidia,lanes = "usb3-1";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};

			usb2-std-A-key {
				nvidia,lanes = "otg-2";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
			rt8153-1-usb3 {
				nvidia,lanes = "usb3-0";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
			
			rt8153-2-usb3 {
				nvidia,lanes = "usb3-2";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
		};
	};

Hi vin zhang,
What is your config in oem guide(Table 16)? https://developer.nvidia.com/embedded/dlc/jetson-tx2-oem-product-designguide

Are you on r28.1?

Hi DaneLLL

I am using R28.1.

My config is config #4 with three usb3.0
When I modified ODMDATA to 0x7090000 and then flash the whole image (flash.sh jetson-tx2 mmcblk0p1) the USB3.0_1 can work and read out 0x2520284 0x2530284 0x2540284 are 0. 0. 0
After modify the ODMDATA , I must flash the whole image?

But when I try to flash tx2 again it is failed with “CPU Bootloader is not running on device” and flash can finish with TX2 EVKit.

I attached the schematic diagram for all USB device.

I have disconnected the OTG USB connector 5V from board 5V power and connect USB connector 5v to USB0_VBUS_DET directly and OTG pin keep floating( It level is 4.7V) . To do these I make this USB connector only can be use for device for flash tx2.

My question is:
1, After modify ODMDATA , Do I must flash the whole image with flash.sh jetson-tx2 mmcblk0p1?
2, After the USB hub work, Why flash TX2 will failed.
3, Why the usbhub cannot work with TX2 default config #2?

For I can not upload picture.

I just descript the USB config.

PEX_RFU(G39 G40 D39 D40) <—> USB3 to GigaE controller
USB_SS1(G42 G43 D42 D43) <—> USB3 to GigaE controller
USB_SS0(F43 F44 C43 C44) and USB2_1 <—> TUSB8041 HUB.

USB2_0 with the forth USB3 port of TUSB8041 <—> USB3.0_TYPEA
USB2_2 <----> USB2.0 TYPEA

These are the flash.sh log.

./tegraflash.py --chip 0x18 --applet "/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/mb1_recovery_prod.bin" --cmd "dump eeprom boardinfo cvm.bin" --skipuid 
Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0032 ] Generating RCM messages
[   0.0052 ] tegrarcm_v2 --listrcm rcm_list.xml --chip 0x18 --download rcm /home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/mb1_recovery_prod.bin 0 0
[   0.0069 ] RCM 0 is saved as rcm_0.rcm
[   0.0090 ] RCM 1 is saved as rcm_1.rcm
[   0.0090 ] List of rcm files are saved in rcm_list.xml
[   0.0091 ] 
[   0.0091 ] Signing RCM messages
[   0.0121 ] tegrasign_v2 --key None --list rcm_list.xml --pubkeyhash pub_key.key
[   0.0144 ] Assuming zero filled SBK key
[   0.0241 ] 
[   0.0241 ] Copying signature to RCM mesages
[   0.0259 ] tegrarcm_v2 --chip 0x18 --updatesig rcm_list_signed.xml
[   0.0280 ] 
[   0.0281 ] Boot Rom communication
[   0.0298 ] tegrarcm_v2 --chip 0x18 --rcm rcm_list_signed.xml --skipuid
[   0.0316 ] RCM version 0X180001
[   0.0330 ] Boot Rom communication completed
[   1.0398 ] 
[   1.0419 ] tegrarcm_v2 --isapplet
[   1.0436 ] Applet version 01.00.0000
[   1.0604 ] 
[   1.0623 ] Retrieving EEPROM data
[   1.0625 ] tegrarcm_v2 --oem platformdetails eeprom cvm /home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/cvm.bin
[   1.0640 ] Applet version 01.00.0000
[   1.0932 ] Saved platform info in /home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/cvm.bin
[   1.1710 ] 
Board ID(3310) version(B02) 
odmdata 0x7090000
PMIC_CONFIG  tegra186-mb1-bct-pmic-quill-p3310-1000-c04.cfg
copying bctfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/P3310_A00_8GB_Samsung_8GB_lpddr4_204Mhz_A02_l4t.cfg)... done.
copying misc_config(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/tegra186-mb1-bct-misc-si-l4t.cfg)... done.
copying pinmux_config(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg)... done.
copying pmic_config(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/tegra186-mb1-bct-pmic-quill-p3310-1000-c04.cfg)... done.
copying pmc_config(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/tegra186-mb1-bct-pad-quill-p3310-1000-c03.cfg)... done.
copying prod_config(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/tegra186-mb1-bct-prod-quill-p3310-1000-c03.cfg)... done.
copying scr_config(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/minimal_scr.cfg)... done.
copying scr_cold_boot_config(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/mobile_scr.cfg)... done.
copying bootrom_config(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/tegra186-mb1-bct-bootrom-quill-p3310-1000-c03.cfg)... done.
copying dev_params(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/BCT/emmc.cfg)... done.
Existing bootloader(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/nvtboot_cpu.bin) reused.
	populating kernel to rootfs... done.
	populating initrd to rootfs... done.
	populating extlinux.conf.emmc to rootfs... done.
	populating /home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/kernel/dtb/tegra186-quill-p3310-1000-c03-00-base.dtb to rootfs... done.
done.
Making Boot image... done.
Existing sosfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/mb1_recovery_prod.bin) reused.
copying tegraboot(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/nvtboot.bin)... done.
Existing mb2blfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/nvtboot_recovery.bin) reused.
Existing mtspreboot(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/preboot_d15_prod_cr.bin) reused.
Existing mts(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/mce_mts_d15_prod_cr.bin) reused.
Existing mb1file(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/mb1_prod.bin) reused.
Existing bpffile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/bpmp.bin) reused.
copying bpfdtbfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb)... done.
Existing scefile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/camera-rtcpu-sce.bin) reused.
Existing spefile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/spe.bin) reused.
copying wb0boot(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/warmboot.bin)... done.
Existing tosfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/tos.img) reused.
Existing eksfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/eks.img) reused.
copying dtbfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/kernel/dtb/tegra186-quill-p3310-1000-c03-00-base.dtb)... done.
Reusing existing system.img... 
done.
Existing tbcfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/cboot.bin) reused.
copying tbcdtbfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/kernel/dtb/tegra186-quill-p3310-1000-c03-00-base.dtb)... done.
copying cfgfile(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/t186ref/cfg/flash_l4t_t186.xml) to flash.xml... done.
Existing flasher(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/nvtboot_recovery_cpu.bin) reused.
Existing flashapp(/home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/tegraflash.py) reused.
*** Updating :kernel-dtb with tegra186-quill-p3310-1000-c03-00-base.dtb ***
./flash.sh: line 1617: [: -eq: unary operator expected
./tegraflash.py  --bl nvtboot_recovery_cpu.bin   --chip 0x18 --applet mb1_recovery_prod.bin --sdram_config P3310_A00_8GB_Samsung_8GB_lpddr4_204Mhz_A02_l4t.cfg --misc_config tegra186-mb1-bct-misc-si-l4t.cfg --pinmux_config tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg --pmic_config tegra186-mb1-bct-pmic-quill-p3310-1000-c04.cfg --pmc_config tegra186-mb1-bct-pad-quill-p3310-1000-c03.cfg --prod_config tegra186-mb1-bct-prod-quill-p3310-1000-c03.cfg --scr_config minimal_scr.cfg --scr_cold_boot_config mobile_scr.cfg --br_cmd_config tegra186-mb1-bct-bootrom-quill-p3310-1000-c03.cfg --dev_params emmc.cfg  --cfg  flash.xml --bins "mb2_bootloader nvtboot_recovery.bin; mts_preboot preboot_d15_prod_cr.bin; mts_bootpack mce_mts_d15_prod_cr.bin; bpmp_fw bpmp.bin; bpmp_fw_dtb tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb; tlk tos.img; eks eks.img; bootloader_dtb tegra186-quill-p3310-1000-c03-00-base.dtb"  --cmd "write kernel-dtb tegra186-quill-p3310-1000-c03-00-base.dtb;"  
Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0109 ] Generating RCM messages
[   0.0127 ] tegrarcm_v2 --listrcm rcm_list.xml --chip 0x18 --download rcm mb1_recovery_prod.bin 0 0
[   0.0141 ] RCM 0 is saved as rcm_0.rcm
[   0.0148 ] RCM 1 is saved as rcm_1.rcm
[   0.0149 ] List of rcm files are saved in rcm_list.xml
[   0.0149 ] 
[   0.0150 ] Signing RCM messages
[   0.0163 ] tegrasign_v2 --key None --list rcm_list.xml --pubkeyhash pub_key.key
[   0.0180 ] Assuming zero filled SBK key
[   0.0239 ] 
[   0.0239 ] Copying signature to RCM mesages
[   0.0254 ] tegrarcm_v2 --chip 0x18 --updatesig rcm_list_signed.xml
[   0.0276 ] 
[   0.0277 ] Boot Rom communication
[   0.0291 ] tegrarcm_v2 --chip 0x18 --rcm rcm_list_signed.xml
[   0.0305 ] BootRom is not running
[   1.0292 ] 
[   1.0312 ] tegrarcm_v2 --isapplet
[   1.0330 ] Applet version 01.00.0000
[   1.0484 ] 
[   1.0502 ] tegrasign_v2 --key None --getmode mode.txt
[   1.0520 ] Assuming zero filled SBK key
[   1.0521 ] 
[   1.0521 ] Parsing partition layout
[   1.0556 ] tegraparser_v2 --pt flash.xml.tmp
[   1.0629 ] 
[   1.0629 ] Creating list of images to be signed
[   1.0648 ] tegrahost_v2 --chip 0x18 --partitionlayout flash.xml.bin --list images_list.xml zerosbk
[   1.0778 ] 
[   1.0778 ] Generating signatures
[   1.0796 ] tegrasign_v2 --key None --list images_list.xml --pubkeyhash pub_key.key
[   1.0815 ] Assuming zero filled SBK key
[   1.1719 ] 
[   1.1719 ] Reading BCT from device for further operations
[   1.1720 ] Generating blob
[   1.1738 ] tegrahost_v2 --align blob_nvtboot_recovery_cpu.bin
[   1.1755 ] 
[   1.1772 ] tegrahost_v2 --appendsigheader blob_nvtboot_recovery_cpu.bin zerosbk
[   1.1794 ] 
[   1.1818 ] tegrasign_v2 --key None --list blob_nvtboot_recovery_cpu_sigheader.bin_list.xml
[   1.1833 ] Assuming zero filled SBK key
[   1.1930 ] 
[   1.1952 ] tegrahost_v2 --updatesigheader blob_nvtboot_recovery_cpu_sigheader.bin.encrypt blob_nvtboot_recovery_cpu_sigheader.bin.hash zerosbk
[   1.1974 ] 
[   1.1989 ] tegrahost_v2 --align blob_nvtboot_recovery.bin
[   1.2004 ] 
[   1.2023 ] tegrahost_v2 --appendsigheader blob_nvtboot_recovery.bin zerosbk
[   1.2042 ] 
[   1.2063 ] tegrasign_v2 --key None --list blob_nvtboot_recovery_sigheader.bin_list.xml
[   1.2076 ] Assuming zero filled SBK key
[   1.2118 ] 
[   1.2141 ] tegrahost_v2 --updatesigheader blob_nvtboot_recovery_sigheader.bin.encrypt blob_nvtboot_recovery_sigheader.bin.hash zerosbk
[   1.2158 ] 
[   1.2176 ] tegrahost_v2 --align blob_preboot_d15_prod_cr.bin
[   1.2191 ] 
[   1.2211 ] tegrahost_v2 --appendsigheader blob_preboot_d15_prod_cr.bin zerosbk
[   1.2226 ] 
[   1.2244 ] tegrasign_v2 --key None --list blob_preboot_d15_prod_cr_sigheader.bin_list.xml
[   1.2262 ] Assuming zero filled SBK key
[   1.2295 ] 
[   1.2312 ] tegrahost_v2 --updatesigheader blob_preboot_d15_prod_cr_sigheader.bin.encrypt blob_preboot_d15_prod_cr_sigheader.bin.hash zerosbk
[   1.2332 ] 
[   1.2348 ] tegrahost_v2 --align blob_mce_mts_d15_prod_cr.bin
[   1.2363 ] 
[   1.2382 ] tegrahost_v2 --appendsigheader blob_mce_mts_d15_prod_cr.bin zerosbk
[   1.2425 ] 
[   1.2443 ] tegrasign_v2 --key None --list blob_mce_mts_d15_prod_cr_sigheader.bin_list.xml
[   1.2461 ] Assuming zero filled SBK key
[   1.2998 ] 
[   1.3018 ] tegrahost_v2 --updatesigheader blob_mce_mts_d15_prod_cr_sigheader.bin.encrypt blob_mce_mts_d15_prod_cr_sigheader.bin.hash zerosbk
[   1.3062 ] 
[   1.3078 ] tegrahost_v2 --align blob_bpmp.bin
[   1.3094 ] 
[   1.3109 ] tegrahost_v2 --appendsigheader blob_bpmp.bin zerosbk
[   1.3136 ] 
[   1.3152 ] tegrasign_v2 --key None --list blob_bpmp_sigheader.bin_list.xml
[   1.3165 ] Assuming zero filled SBK key
[   1.3386 ] 
[   1.3403 ] tegrahost_v2 --updatesigheader blob_bpmp_sigheader.bin.encrypt blob_bpmp_sigheader.bin.hash zerosbk
[   1.3429 ] 
[   1.3444 ] tegrahost_v2 --align blob_tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb
[   1.3461 ] 
[   1.3475 ] tegrahost_v2 --appendsigheader blob_tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb zerosbk
[   1.3502 ] 
[   1.3520 ] tegrasign_v2 --key None --list blob_tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2_sigheader.dtb_list.xml
[   1.3534 ] Assuming zero filled SBK key
[   1.3737 ] 
[   1.3754 ] tegrahost_v2 --updatesigheader blob_tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2_sigheader.dtb.encrypt blob_tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2_sigheader.dtb.hash zerosbk
[   1.3778 ] 
[   1.3793 ] tegrahost_v2 --align blob_tos.img
[   1.3808 ] 
[   1.3822 ] tegrahost_v2 --appendsigheader blob_tos.img zerosbk
[   1.3839 ] 
[   1.3856 ] tegrasign_v2 --key None --list blob_tos_sigheader.img_list.xml
[   1.3869 ] Assuming zero filled SBK key
[   1.3901 ] 
[   1.3918 ] tegrahost_v2 --updatesigheader blob_tos_sigheader.img.encrypt blob_tos_sigheader.img.hash zerosbk
[   1.3935 ] 
[   1.3950 ] tegrahost_v2 --align blob_eks.img
[   1.3964 ] 
[   1.3980 ] tegrahost_v2 --appendsigheader blob_eks.img zerosbk
[   1.3994 ] 
[   1.4013 ] tegrasign_v2 --key None --list blob_eks_sigheader.img_list.xml
[   1.4026 ] Assuming zero filled SBK key
[   1.4028 ] 
[   1.4049 ] tegrahost_v2 --updatesigheader blob_eks_sigheader.img.encrypt blob_eks_sigheader.img.hash zerosbk
[   1.4065 ] 
[   1.4079 ] tegrahost_v2 --align blob_tegra186-quill-p3310-1000-c03-00-base.dtb
[   1.4094 ] 
[   1.4107 ] tegrahost_v2 --appendsigheader blob_tegra186-quill-p3310-1000-c03-00-base.dtb zerosbk
[   1.4129 ] 
[   1.4146 ] tegrasign_v2 --key None --list blob_tegra186-quill-p3310-1000-c03-00-base_sigheader.dtb_list.xml
[   1.4160 ] Assuming zero filled SBK key
[   1.4299 ] 
[   1.4316 ] tegrahost_v2 --updatesigheader blob_tegra186-quill-p3310-1000-c03-00-base_sigheader.dtb.encrypt blob_tegra186-quill-p3310-1000-c03-00-base_sigheader.dtb.hash zerosbk
[   1.4335 ] 
[   1.4352 ] tegrahost_v2 --generateblob blob.xml blob.bin
[   1.4365 ] number of images in blob are 9
[   1.4368 ] blobsize is 3736872
[   1.4370 ] Added binary blob_nvtboot_recovery_cpu_sigheader.bin.encrypt of size 184576
[   1.4388 ] Added binary blob_nvtboot_recovery_sigheader.bin.encrypt of size 78080
[   1.4394 ] Added binary blob_preboot_d15_prod_cr_sigheader.bin.encrypt of size 61472
[   1.4399 ] Added binary blob_mce_mts_d15_prod_cr_sigheader.bin.encrypt of size 2077088
[   1.4403 ] Added binary blob_bpmp_sigheader.bin.encrypt of size 528800
[   1.4408 ] Added binary blob_tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2_sigheader.dtb.encrypt of size 466160
[   1.4417 ] Added binary blob_tos_sigheader.img.encrypt of size 58880
[   1.4420 ] Added binary blob_eks_sigheader.img.encrypt of size 1488
[   1.4423 ] Added binary blob_tegra186-quill-p3310-1000-c03-00-base_sigheader.dtb.encrypt of size 280176
[   1.4438 ] 
[   1.4439 ] Sending bootloader and pre-requisite binaries
[   1.4454 ] tegrarcm_v2 --download blob blob.bin
[   1.4468 ] Applet version 01.00.0000
[   1.4594 ] Sending blob
[   1.4596 ] [................................................] 100%
[   2.2714 ] 
[   2.2734 ] tegrarcm_v2 --boot recovery
[   2.2751 ] Applet version 01.00.0000
[   2.2889 ] 
[   2.2906 ] tegrarcm_v2 --isapplet
[   2.9188 ] 
[   2.9208 ] tegradevflash_v2 --iscpubl
[   2.9225 ] CPU Bootloader is not running on device.
[   2.9232 ] 
[  95.5710 ] Writing partition
[  95.5730 ] tegradevflash_v2 --write kernel-dtb /home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/tegra186-quill-p3310-1000-c03-00-base.dtb
[  95.5748 ] Cannot Open USB
[  95.5752 ] 
Error: Return value 8
Command tegradevflash_v2 --write kernel-dtb /home/nvidia/jetpack/jetpack_download/Linux_for_Tegra/bootloader/tegra186-quill-p3310-1000-c03-00-base.dtb
Failed to flash/read t186ref.

the a00-base dts file

usb_cd {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
		phy-names = "otg-phy";
	};

	xotg {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
		phy-names = "otg-usb2";
	};

	xudc@3550000 {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
		phy-names = "usb2";
		emc-frequency = <150000000>;
	};

	xhci@3530000 {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(2)>;
		phy-names = "utmi-0", "utmi-1", "usb3-1", "utmi-2", "usb3-0", "usb3-2";
		nvidia,boost_cpu_freq = <800>;
	};

	pinctrl@3520000 {
		status = "okay";
		pinctrl-0 = <&tegra_xusb_padctl_pinmux_default>;
		pinctrl-names = "default";
		tegra_xusb_padctl_pinmux_default: pinmux {
			/* Quill does not support usb3-micro AB */
			usb2-expender-A {
				nvidia,lanes = "otg-0";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_OTG_CAP>;
				status = "okay";
			};
			tusb8041-usb2 {
				nvidia,lanes = "otg-1";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
			tusb8041-usb3 {
				nvidia,lanes = "usb3-1";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "disabled";
			};

			usb2-std-A-key {
				nvidia,lanes = "otg-2";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
			rt8153-1-usb3 {
				nvidia,lanes = "usb3-0";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "disabled";
			};
			
			rt8153-2-usb3 {
				nvidia,lanes = "usb3-2";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "disabled";
			};
		};
	};
	
	pcie-controller@10003000 {
		status = "okay";
		pci@1,0 {
			nvidia,num-lanes = <1>;
			status = "disabled";
		};
		pci@2,0 {
			nvidia,num-lanes = <1>;
			status = "disabled";
		};
		pci@3,0 {
			nvidia,num-lanes = <1>;
			status = "disabled";
		};
	};

The above dts is wrong one , The correct one is this

usb_cd {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
		phy-names = "otg-phy";
	};

	xotg {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
		phy-names = "otg-usb2";
	};

	xudc@3550000 {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
		phy-names = "usb2";
		emc-frequency = <150000000>;
	};

	xhci@3530000 {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(2)>;
		phy-names = "utmi-0", "utmi-1", "usb3-1", "utmi-2", "usb3-0", "usb3-2";
		nvidia,boost_cpu_freq = <800>;
	};

	pinctrl@3520000 {
		status = "okay";
		pinctrl-0 = <&tegra_xusb_padctl_pinmux_default>;
		pinctrl-names = "default";
		tegra_xusb_padctl_pinmux_default: pinmux {
			/* Quill does not support usb3-micro AB */
			usb2-expender-A {
				nvidia,lanes = "otg-0";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_OTG_CAP>;
				status = "okay";
			};
			tusb8041-usb2 {
				nvidia,lanes = "otg-1";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
			tusb8041-usb3 {
				nvidia,lanes = "usb3-1";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};

			usb2-std-A-key {
				nvidia,lanes = "otg-2";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
			rt8153-1-usb3 {
				nvidia,lanes = "usb3-0";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
			
			rt8153-2-usb3 {
				nvidia,lanes = "usb3-2";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";
			};
		};
	};

Hi vin zhang,
The device tree for USB looks ok, so which port does not work on your custom board? Any error is shown in boot log? ODMDATA 0x7090000 is correct for config #4.

You may need the following device tree for PCIe:

pcie-controller@10003000 {
		status = "okay";
		pci@1,0 {
			nvidia,num-lanes = <1>;
			status = "okay";
		};
		pci@2,0 {
			nvidia,num-lanes = <1>;
			status = "okay";
		};
		pci@3,0 {
			nvidia,num-lanes = <1>;
			status = "disabled";
		};
	};

Hi DaneLLL

Now only TUSB8041 usb hub which connected with USB_SS0(F43 F44 C43 C44) can work.

PEX_RFU(G39 G40 D39 D40) <—> USB3 to GigaE controller
USB_SS1(G42 G43 D42 D43) <—> USB3 to GigaE controller

can not work but I can not confirm whether USB3 to GigaE IC dont work or TX2 USB3 dont work.

For the TUSB8041 usb hub USB_SS0(F43 F44 C43 C44)

Are these pin correspond to dts file TEGRA_PADCTL_PHY_USB3_P(1)@3530000 and usb3-1@3520000 ?

When I disable usb3-1 , USB_SS0 will not work and if I disable usb3-0 or usb3-2 , usb hub work fine.

And with ODMDATA 0x2090000 USB_SS0 work fine,with 0x4090000 and 0x1090000 usb hub can not work.

So does the USB_SS0 pad belong to USB PHY Lane1 and ODMDATA bit 25? But in the “Tegra_Linux_Driver_Package_TX2_Adaptation_Guide” document USB Lane Mapping Table in page12 USB_SS0 is belong to lane0. Is this a mistake?

Hi DaneLLL

Above post is wrong.
My mistaken. USB hub is connected to USB1 instead of USB0

My board physical connection are :

USB_SS0(F43 F44 C43 C44) and USB2_1 <—> USB3 to GigaE controller
PEX_RFU(G39 G40 D39 D40) and USB2_1 <—> TUSB8041 HUB.
USB_SS1(G42 G43 D42 D43) <—> USB3 to GigaE controller

With ODMDATA=0x7090000 and all usb enable dts, USB3_0 and USB3_1 can work but USB3_2 can not work.
And I measured the impedence of USB3_2 tx pin is around 10K. but USB3_1 tx pin impedence is Hi-Z

USB hub attached on PEX_RFU is work.
The USB3 to Gigae IC on USB_SS0 can be found.
But USB3 to Gigae IC on USB_SS1 can not be found.

Hi DaneLLL
All USB3 are working fine now,thank you.

But there is a flash.sh issue, I will create a new thread to discuss this issue.

Hi vin.zhang
We have the same issue on jetpack3.2.1. When we insert a usb3.0 disk into USB_SS1, but is recognized as usb2.0. After we use your dts in #13, the result is the same.The hardware is ok working on jetpack3.0. Could you kindly told us is there any other works need to be done? Thanks very much!