I want to connect a PCIe EP to the Jetson TX2, but the Jetson clock is colliding with the EP clock. Is it possible to disable the REFCLK for the PCIe Slot on the Jetson TX?

What do you mean by ‘Jetson clock colliding with EP clock’? Isn’t EP supposed to expect REFCLK from the host i.e. Jetson in this case? Are you saying EP has its own clock and doesn’t need REFCLK from the Jetson? If yes, I’m afraid we don’t support independent REFCLK configuration. You may observe PCIe linkup issues if you use a different REFCLK (different from Jetson’s) for the EP.

Yes, the EP is expected the use the REFCLK from the host, but the EP in this case is a SOC which can be used as an EP or RC and is sending out a REFCLK as well. The answer that that the Jetson doesn’t support independent REFCLK configuration is sufficient.