Do all DMAs go through the encrypted channel when H100 is in CC mode?

Hi,

I tried comparing the difference on DMA code path between CC and non-CC. In function block_copy_push, whether the DMA uses encrypted channel depends on uvm_conf_computing_mode_enabled(gpu).

if (uvm_conf_computing_mode_enabled(gpu)) {
    // DMA using encrypted channel
    return;
}
    // DMA without encryption
    gpu->parent->ce_hal->memcopy(push, gpu_dst_address, gpu_src_address, uvm_va_block_region_size(region));

However, some DMAs that are related to page table entries, only call the unencrypted DMA function (ce_hal->memcopy instead of ce_hal->decrypt). Here is part of the stack strace of execution on a non-CC GPU.

[19032.937755]  uvm_hal_volta_ce_memcopy+0x21e/0x240 [nvidia_uvm]
[19032.939084]  ? uvm_pushbuffer_get_gpu_va_for_push+0x5d/0xc0 [nvidia_uvm]
[19032.940599]  ? __pfx_uvm_hal_volta_ce_memcopy+0x10/0x10 [nvidia_uvm]
[19032.942045]  uvm_pte_batch_flush_ptes.part.0+0x88/0x120 [nvidia_uvm]
[19032.943494]  uvm_pte_batch_end+0x1c/0x90 [nvidia_uvm]
[19032.944699]  uvm_pte_batch_single_write_ptes+0x5c/0x90 [nvidia_uvm]
[19032.946121]  map_rm_pt_range+0x36d/0x520 [nvidia_uvm]
[19032.947280]  uvm_va_range_map_rm_allocation+0x30f/0x410 [nvidia_uvm]
[19032.948705]  ? __pfx_entry_size_pascal+0x10/0x10 [nvidia_uvm]
[19032.950017]  ? uvm_map_external_allocation_on_gpu.isra.0+0x2ea/0x470 [nvidia_uvm]
[19032.951702]  ? __pfx_page_sizes_pascal+0x10/0x10 [nvidia_uvm]
[19032.953028]  uvm_map_external_allocation_on_gpu.isra.0+0x2ea/0x470 [nvidia_uvm]
[19032.954671]  uvm_api_map_external_allocation+0x25a/0x520 [nvidia_uvm]
[19032.956132]  ? uvm_ioctl+0x14ce/0x18a0 [nvidia_uvm]

The part of trace starts with uvm_api_map_external_allocation, an ioctl from userspace, and ends with uvm_hal_volta_ce_memcopy. I did not find CC mode checking (like uvm_conf_computing_mode_enabled(gpu)) on this code path.

In H100 CC mode, would these ioctls result in unencrypted DMAs, or indeed encrypted DMAs (I may miss some code)?