I am looking for a document describing NVIDIA GPU native instruction set. Do you have any? Thanks.
We don’t publish the GPU native instruction set because it changes significantly between generations. You can find documentation for the PTX ISA (which is pretty close to the hardware) here:
I understand the following questions may be vexing to some, but I need to know.
- Do the instruction sets, present, legacy, future, ever at any point in development and past release, include means of accessing system hardware resources outside of the gpus?
- If so, is there a way I or nvidia can expose them via PTX?
- Do the instruction sets, present, legacy, future, ever at any point in development and past release, include means of executing self-hosted/hosting code?
- Is it possible to bypass the 'from-cpu-offloading-model' on discrete nVidia gpus (those without arm cores)?
- How do I compile cpu-bypassing self-hosted code?
- Is there any form to use the nvidia GTXs, RTXs, Titan and TESLA cards as independent processors (self-sufficient, without an attached cpu runtime) other than those described above?
- Do nVidia GPUs (any sort) possess capability to run a custom implementation of the RedoxOS kernel, if one was achieved with gpu asm code?
Thank you for your time and attention.
Not with current GPUs. The closest you can come to a self-contained platform is by using NVIDIA’s Tegra-line processors, which combine ARM cores with a GPU. I believe the latest model is the TX2, as described here:
As for access to system hardware resources outside the GPU, current GPUs allow access to system memory (with the co-operation of the host OS, of course, otherwise it would be a giant security hole):
The latest model Tegra-line processor is Jetson AGX (Xavier):