Does AVDD_PLL_UD2DPD necessary for USB0 recovery

Hi All,

My board can’t estimate connection with PC by USB0
and checked power sequence, clock were work well and met specification
but it didn’t connect AVDD_PLL_UD2DPD to 1.05V,
I checked the datasheet that said PLLU for USB2.0, but no description about which one port.
AVDD_PLL_UTMIP is for USB0 for sure, but how about AVDD_PLL_UD2DPD?
I am afraid that I need to relayout due to forgot AVDD_PLL_UD2DPD to 1.05V

PLLU is the clock source for USB PHY, it should not be unconnected.

and does it still impact HDMI function?
I found PLLD2 is related to HDMI & MIPI, and I still need HDMI

Yes, PLLD2 is also powered by it and is for HDMI & MIPI.

another question about VDDIIO_PEX_CTL
VDDIIO_PEX_CTL is related to PCIe/USB3.0 control block rail,
Does it mean that if I lost this pin connection, the USB3.0 function will be fail?


You need to check your own design by following checklist sheet that in the chapter 9, Design Checklist, of JetsonTK1 Embedded DG.