Does T186 nvdisplay driver or GP10B support Tiling Formats Pitch Linear?

[Hooky]

Hello all,
We are currently doing some work on TX2 display framebuffer.
We’ve checked the Park_TRM, chapter 20 said that, the Parker Series Soc support Tiling Formats include Pitch Linear and Block Linear. But when we read the driver code of tegra dc in l4t, we can’t find the code pieces about the tiling formats settings.
In the function “tegra_dc_update_windows” in “kernel/nvidia/drivers/video/tegra/dc/window.c”, we believed that the t186 called the function “tegra_nvdisp_update_windows”, and the codes below in function “tegra_nvdisp_win_attribute” may set the reg about the win’s tiling formats

 if (WIN_IS_BLOCKLINEAR(win)) {
        nvdisp_win_write(win, win_surface_kind_kind_bl_f() |
            win_surface_kind_block_height_f(win->block_height_log2),
            win_surface_kind_r());
    } else if (WIN_IS_TILED(win)) {
        nvdisp_win_write(win, win_surface_kind_kind_tiled_f(),
            win_surface_kind_r());
    } else {
        nvdisp_win_write(win, win_surface_kind_kind_pitch_f(),
            win_surface_kind_r());
    }

the win’s flags property is passed by the caller in “tegra_dc_ioctl”, under cmd type
TEGRA_DC_EXT_FLIP4, but how can we tell the caller(which we believed is the GPU) to switch the tiling formats to “Pitch Linear”? Is it supported in the nvdisplay driver of Parker?

We have found that in “tegra_dc_ext_control_ioctl” of cmd “TEGRA_DC_EXT_CONTROL_GET_CAPABILITIES”, the caller may get capabilities of dc, we’ve tried to delete the capabilities "TEGRA_DC_EXT_CAPABILITIES_BLOCKLINEAR "and “TEGRA_DC_EXT_CAPABILITIES_NVDISPLAY” ( which value is 1<<5), but it did not work, after the change we can only see the cursor on the screen.

 static int get_capabilities(struct tegra_dc_ext_control_capabilities *caps)
{
    caps->caps = TEGRA_DC_EXT_CAPABILITIES_CURSOR_MODE |
            TEGRA_DC_EXT_CAPABILITIES_BLOCKLINEAR |
            TEGRA_DC_EXT_CAPABILITIES_CURSOR_TWO_COLOR;
    if (tegra_dc_is_nvdisplay())
        caps->caps |= TEGRA_DC_EXT_CAPABILITIES_NVDISPLAY;
    return 0;
}

By the way, does function “tegra_nvdisp_update_windows” support partial_update,(just like the _tegra_dc_program_windows do )? we just find the annotations below:

/* if (do_partial_update) { */
/* /\* calculate the xoff, yoff etc values *\/ */
 /* tegra_dc_win_partial_update(dc, win, xoff, yoff, */
/*  width, height); */
 /* } */

[WayneWWW]

I am not sure what you want to achieve here.

If kernel driver has those code, it indicate the hardware should support it.

But the problem is whether the upper layer tegra driver is able to handle such request and send it to kernel.

For example, our Xorg has our own driver which will use the nvdc API to send ioctl to nvdisplay driver.

If you want to write your own application, you can try to use drm-nvdc API here. The default desktop GUI is based on this driver.

https://docs.nvidia.com/jetson/l4t-multimedia/drm-nvdc-docs_8h.html

[Hooky]

Thanks for your reply!
We intend to use the CPU to manipulate the framebuffer, and use nvdc to display it on screen, which need the dc driver to support Pitch Linear tiling formats.

For example, our Xorg has our own driver which will use the nvdc API to send ioctl to nvdisplay driver.

About the Xorg’s driver you mentioned in your reply, could you provide more info about it, or where can I get its source code?
thanks again.

[WayneWWW]

That is the problem. We don’t release source code for these graphic drivers.

[Hooky]

ok, thanks for explanation.
But how can we told the GPU in TX2 (which we believe is GP10B) to access the framebuffer memory as Pitch Linear Format, instead of Block Linear Format, like the “get_capabilities” function do, is it achievable?

[WayneWWW]

Our MMAPI sample has the usecase for pitch linear buffer. Let sdkmanager download it and refer to this sample code.

./samples/08_video_dec_drm/video_dec_drm.cpp

You should use the nvbuffer API instead of doing those works in kernel.

[Hooky]

Thanks. We’ll take a look.