Does the SYS_RESET* not go low when rebooting?

I have a couple of questions:

  1. Does the SYS_RESET* not go low and high during reboot on the Nano Devkit?

  2. We have a custom carrier board on which we have some USB peripherals connected to the carrier power supplies. During the power up sequence, the SYS_RESET* goes high, enabling the carrier power supplies and subsequently the USB peripherals are powered on. We would like to have the SYS_RESET* go low and back high during the reboot procedure as we want the USB peripherals to undergo a power cycle. What would be the ways to achieve this?

Thanks.

Please refer to the Design Guide doc. SYS_RESET is low first during power on sequence, and then goes high after module power on so as to enable carrier supplies.

Yup. This is clear from the Product Design Guide. I want to know the behaviour of the SYS_RESET* pin on rebooting the board. Does the pin go low and back high during the reboot procedure?

Yes, it should be low and back high during reboot.

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