What is the maximum drive strength of CZ pads? According to the Jetson TX1 OEM Product Design Guide I would expect it to be 2mA, just as it is for ST pins. To drive with 2mA my understanding is, that up and down drive need to be set to 127 in SDMMC3_PAD_CFG. Is that correct?
We’re trying to use GPIO3_PP02, which uses the SDMMC3_DAT3 pad, as a GPIO output to control an ICs reset signal. Having an external 10k pull down on this pin, I can not get the pin above ~500mV level. If I leave the pin unconnected, so without any load it’s drive to 1.8V.
Looking in the debugfs, the drive values seemed to be set to 18 for up and down only:
# echo drive_sdmmc3 > /sys/kernel/debug/pinctrl/700008d4.pinmux/pinconf-pin-prop
# cat /sys/kernel/debug/pinctrl/700008d4.pinmux/pinconf-pin-prop
PinName: drive_sdmmc3
Pin Properties:
pull-down-strength=18
pull-up-strength=18
slew-rate-falling=1
slew-rate-rising=1
So we tried modifying pull-down-strength via device-tree. For this we added the following to our boards pinmux dtsi file:
/ {
pinmux: pinmux@700008d4 {
[...]
drive_default: drive {
sdmmc3 {
nvidia,pins = "drive_sdmmc3";
nvidia,pull-down-strength = <127>;
nvidia,pull-up-strength = <127>;
};
};
};
};
The updated DTB is flashed to the DTB partition using ./flash.sh -k DTB boardname mmcblk0p1
, which apparently works. Now I had expected that CBoot would take care of applying these values.
Still after rebooting the strength values remain at 18.
I actually hacked something together to rewrite the SDMMC3_PAD_CFG register after the kernel is fully booted. This makes the values reported by /sys/kernel/debug/pinctrl/700008d4.pinmux/pinconf-pin-prop
correct, but still the drive strength appears unchanged.
Am I missing anything here?