Enable spidev.3.1 and spidev.3.2 on TX2

Hi Guys,

i need three SPIs on my TX2.
After i followed this tutorial (https://elinux.org/Jetson/TX2_SPI), i have
/dev/spidev3.0 and it works!

Now i want two more SPIs in my device tree.
Can you tell me what i have to change in the device tree file to enable spidev3.1 and spidev3.2?
It doesn´t matter when the other SPIs are not routed to a nice pin header like J21A.

thanks for your help!

regards
Sebastian

@sebastian
Looks like this SPI bus only have one chip select pin I think you couldn’t enable spidev3.1 and spidev3.2

I just need a second SPI accessable over /dev/spidev…
Do you mean that the whole Board has only one SPI available?

Do you what to connect second third device to the same bus or different bus.
If you what to connect to different bus like j23 have below two you can connect to. And find correspond function in DT to enable it.

pin 38, 40, 42, 44 spi2 = “spi@32300000”
pin 104, 106, 108, 110 spi0 = “spi@32100000”

Problem solved:

https://devtalk.nvidia.com/default/topic/1024806/jetson-tx2/how-to-enable-spi-spidev-on-28-1-on-target-/post/5234810/#5234810

Hhi,
I think that pins for SPI0 are 38,40,42,44 and pins for SPI2 are 104, 106, 108, 110.

Page 19 from:
Jetson_TX1_TX2_Developer_Kit_Carrier_Board_Specification_v20170501.pdf

@asgomez
Suppose you are talk about the pin name. However the pin name’s number not equal to function number.
Please check the pinmux table to know the function map.

And correct my earlier comment the function SPI2 actually map to software SPI1@c260000 for TX2. (HW base from 1, software base from 0)

pin name function.

SPI0_CLK E3 GPIO_SEN1 unused_GPIO_SEN1 SPI2_SCK
SPI0_MISO E4 GPIO_SEN2 unused_GPIO_SEN2 SPI2_DIN
SPI0_MOSI F4 GPIO_SEN3 unused_GPIO_SEN3 SPI2_DOUT
SPI0_CS0# F3 GPIO_SEN4 unused_GPIO_SEN4 SPI2_CS0

I have tested it now (loopback test) over pin 106-108 (SPI2_MISO-SPI2_MOSI) on J23 connector.
Its address is spi@3210000, and it works fine.