Enabling C7 PCIe on Jetson Orin Nano issue

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin Nano
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1

Hi, I have a custom board based on Jetson Orin Nano 8 GB dev kit. I want to use C7 PCIe in RC mode, 1 lane, gen 3. I cant`t understand if my config goes wrong or EP config on the other side.
The setup is: Jetson Orin Nano C7 PCIe RC mode - TI, AM6442 EP mode. On AM6442 loaded simple example project wich just enables EP mode, Vendor and Device ID, etc.
In dmesg log i see that root bus 0007 loaded and link is up, but after a while :

[ 78.813724] pci 0007:01:00.0: not ready after 65535ms; giving up

so in lspci has only 0007:00:00.0

AM6442 prompt that the pcie link is up.

I tried different variants of configuring pcie@141e0000, but result is same.

Could you give some recommendations for testing pcie?

R36 (release), REVISION: 4.3, GCID: 38968081, BOARD: generic, EABI: aarch64, DATE: Wed Jan 8 01:49:37 UTC 2025
KERNEL_VARIANT: oot

lspci_2025_05_03.txt (31.9 KB)
dmesg_2025_05_03.txt (59.8 KB)
kernel_tegra234-p3768-0000+p3767-0003-nv.txt (317.5 KB)

3

Sorry for the late response.
Is this still an issue to support? Any result can be shared?

4

Hi, no positive results yet. Now we are trying to up PCIe in Linux for AM6442 to get certainty where the problem is. May be the problem is on the AM6442 side.

When we are trying to reboot AM6442 we get this message in dmesg:

[Jan 7 03:17] pcieport 0007:00:00.0: AER: Multiple Corrected error received: 0007:00:00.0
[  +0.000021] pcieport 0007:00:00.0: PCIe Bus Error: severity=Corrected, type=Physical Layer, (Receiver ID)
[  +0.000003] pcieport 0007:00:00.0:   device [10de:229a] error status/mask=00000001/0000e000
[  +0.000003] pcieport 0007:00:00.0:    [ 0] RxErr                  (First)
[  +0.025052] pcieport 0007:00:00.0: AER: Uncorrected (Fatal) error received: 0007:00:00.0
[  +0.000019] pcieport 0007:00:00.0: PCIe Bus Error: severity=Uncorrected (Fatal), type=Transaction Layer, (Receiver ID)
[  +0.000003] pcieport 0007:00:00.0:   device [10de:229a] error status/mask=00000020/00400000
[  +0.000003] pcieport 0007:00:00.0:    [ 5] SDES                   (First)
[  +0.010787] pcieport 0007:00:00.0: AER: Root Port link has been reset (0)
[  +0.000014] pcieport 0007:00:00.0: AER: device recovery successful

dmesg_2025_06_19.txt (68.9 KB)

As we think the PHY lvl is ok, problem is somewhere else.

6

Only PCIe LA trace would help clarify. If you don’t have such equipment, please review your hardwre design.

Also, below attempt is not helping. Please restore setting to default.

I tried different variants of configuring pcie@141e0000, but result is same.

7

Thx, will be researching more.

Just for clearing:
If Jetson and am64 borth working by Linux, and if everything is ok, then we should see something like this in lspci:

Jetson:
Bus 0007:00
Ti am64 0007:01 (vendor id, product id)

Am64:
Bus 0001:00
Jetson 0001:01

Or on the endpoint side we shouldn’t see anything?

And the self-made drivers don’t needed to get link up, get vendors id, read/write BAR manually?

8

Only the root port side will see endpoint device in lspci.

You won’t root port on your endpoint’s lspci.

And the self-made drivers don’t needed to get link up, get vendors id, read/write BAR manually?

I don’t know what are you trying to ask here. Are you talking about device driver?