Ethernet Issue in jetson xavier nx

[dxt]

Hello,

I am using the jetson xavier nx (production module) with custom carrier board.
I am using Jetson Linux 35.4.1. I am the pinmux file given from manufacturer, i have the From the SOM , we can confirm that we are using RTL 8211FI M2CT5H6

My issue is i am not getting the ethernet (1Gbps) as up when i checked in the dmesg log.

[    0.000000] psci: probing for conduit method from DT.
[    2.799445] usbcore: registered new interface driver cdc_ether
[    4.107333] optee: probing for conduit method.
[    7.445570] nvethernet 2490000.ethernet: Adding to iommu group 27
[    7.445921] nvethernet 2490000.ethernet: failed to read skip mac reset flag, default 0
[    7.445927] nvethernet 2490000.ethernet: failed to read MDIO address
[    7.445934] nvethernet 2490000.ethernet: setting to default DMA bit mask
[    7.445938] nvethernet 2490000.ethernet: set default TXQ to TC mapping
[    7.445943] nvethernet 2490000.ethernet: Setting default PTP RX queue
[    7.445954] nvethernet 2490000.ethernet: Failed to read DMA Tx ring size, using default [1024]
[    7.445959] nvethernet 2490000.ethernet: Failed to read DMA Rx ring size, using default [1024]
[    7.689911] nvethernet 2490000.ethernet: Ethernet MAC address: 48:b0:2d:7a:8b:55
[    7.690675] nvethernet 2490000.ethernet: Macsec not supported/Not enabled in DT
[    7.692045] nvethernet 2490000.ethernet: eth0 (HW ver: 50) created with 1 DMA channels
[   13.011504] using random self ethernet address
[   13.012700] using random host ethernet address
[   13.924024] using random self ethernet address
[   13.925050] using random host ethernet address
[  168.652552] using random self ethernet address
[  168.653578] using random host ethernet address
[  169.648313] using random self ethernet address
[  169.649755] using random host ethernet address

I have attached the full dmesg log below
dmesg.txt (68.0 KB)

below is the node with respect to Ethernet in my tegra194-p3668-0001-p3509-0000.dts ( this dts is generated from the tegra194-p3668-0001-p3509-0000.dtb file using the dtc compiler).

	ethernet@2490000 {
    	compatible = "nvidia,nveqos";
    	reg = <0x00 0x2490000 0x00 0x10000>;
    	reg-names = "mac";
    	interrupts = <0x00 0xc2 0x04 0x00 0xba 0x04 0x00 0xbe 0x04>;
    	clocks = <0x04 0x120 0x04 0x20 0x04 0x22 0x04 0x21 0x04 0x23 0x04 0x08 0x04 0x24 0x04 0x25 0x04 0x26>;
    	clock-names = "pllrefe_vcoout\0eqos_axi\0eqos_rx\0eqos_ptp_ref\0eqos_tx\0axi_cbb\0eqos_rx_m\0eqos_rx_input\0eqos_tx_divider";
    	resets = <0x04 0x11>;
    	interconnects = <0x03 0x8e 0x03 0x8f>;
    	interconnect-names = "dma-mem\0write";
    	reset-names = "mac";
    	nvidia,promisc_mode = <0x01>;
    	nvidia,num-dma-chans = <0x01>;
    	nvidia,dma-chans = <0x00>;
    	nvidia,slot_num_check = <0x00 0x00 0x00 0x00>;
    	nvidia,slot_intvl_vals = <0x00 0x7d 0x7d 0x7d>;
    	nvidia,num-mtl-queues = <0x01>;
    	nvidia,mtl-queues = <0x00>;
    	nvidia,rx-queue-prio = <0x02>;
    	nvidia,dcs-enable = <0x01>;
    	nvidia,pad_calibration = <0x01>;
    	nvidia,tx-queue-prio = <0x00>;
    	iommus = <0x02 0x14>;
    	iommu-resv-regions = <0x00 0x00 0x00 0x40000000 0x00 0x60000000 0xffffffff 0xffffffff>;
    	dma-coherent;
    	nvidia,rx_riwt = <0x100>;
    	nvidia,rx_frames = <0x40>;
    	nvidia,tx_usecs = <0x100>;
    	nvidia,tx_frames = <0x05>;
    	nvidia,ptp_ref_clock_speed = <0x12a05f20>;
    	status = "okay";
    	pinctrl-names = "mii_rx_disable\0mii_rx_enable";
    	pinctrl-0 = <0x18>;
    	pinctrl-1 = <0x19>;
    	nvidia,rxq_enable_ctrl = <0x02>;
    	nvidia,pause_frames = <0x01>;
    	nvidia,phy-reset-gpio = <0x0c 0x89 0x00>;
    	phy-mode = "rgmii-id";
    	phy-handle = <0x1a>;
    	nvidia,max-platform-mtu = <0x3fff>;
    	nvidia,pad_auto_cal_pu_offset = <0x00>;
    	nvidia,pad_auto_cal_pd_offset = <0x00>;


		eqos-cool-dev {
			cooling-min-state = <0x00>;
			cooling-max-state = <0x05>;
			#cooling-cells = <0x02>;
			phandle = <0x27f>;
		};

		prod-settings {
			#prod-cells = <0x04>;

			prod {
				prod = <0x00 0x8800 0x80000000 0x00 0x00 0x8804 0x20000000 0x20000000>;
			};
		};

		mdio {
			compatible = "nvidia,eqos-mdio";
			#address-cells = <0x01>;
			#size-cells = <0x00>;

			phy@0 {
				reg = <0x01>;
				interrupt-parent = <0x0c>;
				interrupts = <0x34 0x08>;
				marvell,copper-mode;
				marvell,reg-init = <0x03 0x12 0x7fff 0x880>;
				nvidia,phy-rst-pdelay-msec = <0xe0>;
				nvidia,phy-rst-duration-usec = <0x2710>;
				phandle = <0x1a>;
			};
		};
	};

I have attached the dts file tegra194-p3668-0001-p3509-0000.dts below (Attached dts file in .txt format )

tegra194-p3668-0001-p3509-0000_dts.txt (393.9 KB)

Anyone has faced this issue before ?
What changes do i need to make in the dtsi file ?

[WayneWWW]

The log in your dmesg is not harmful. No need to do anything.

[dxt]

but i need to get the log saying as Ethernet 1GBPS dfull tx/rx is up

Because the data from this eth handle is going to ETHERNET PHY
DP83867ISRGZT(which is connected to the zynq)

here i am unable to get the eth handle (even after on the other side it is programmed)

[WayneWWW]

Xavier NX cannot configure this part. Nothing we can help here.

[dxt]

when i do ifconfig i am seeeing the eth0 handle

I am able to set the ip address to this eth0 handle , so does it mean my ethernet is configured correctly ?

[WayneWWW]

I am not quite sure about what kind of question you are trying to ask here.
This is even not a question.

Xavier NX ethernet port is a fixed PHY inside Xavier NX module. It is not allowed to change it and also no need to change it.
The software is not needed to be changed either because default BSP already configured it correctly.

Your trying is something that should not happen at all. Thus, I really don’t understand what you are trying here.

[dxt]

As you can see from the above image (from schematic)
On the left side i have my xavier nx module from which the eth signals are going to ethernet phy DP83867ISRGZT which is programmed by zynq.

In the below image from the schematic,
ethernet tx, rx signals (ETH_TXRXP_A, ETH_TXRXM_A, …) (highilighted by black colour) from the SOM are connecting to another eth controller DP83867ISRGZT . which can be seen in image dp.png

In the above the signals from the jetson som (Integrated eth phy)are connecting to the above dp Ethernet controller ( highlighted by black colour)

So here between both the eth controller i am unable to communicate /ping .

[dxt]

I am able to get the eth working
The issue was on the other side the other ethernet controller DP83867ISRGZT has not got programmed properly.
Now i have got the dmesg saying

Ethernet 1Gbps full control tx/rx is up

So now both the ethernet phy’s are able to communicate

Thank you.

[WayneWWW]

As I already said in the beginning… this configuration won’t be happened on Jetson side…

[dxt]

Yes it’s correct as you mentioned in the beginning

Thanks for the help : )