Hello everyone,
I have a question regarding the possibility of expanding the address space using DRAM for both program and data. Based on my calculations, the core part of SPE base program(freertos, bpmp, processors init etc.) alone takes up nearly 131KB, leaving only 125KB for additional tasks. Is there a way to extend the address space to accommodate more memory for my program and data?
Upon checking spe.map, I noticed that a lot of space is occupied by debug_str and similar sections. Is there an option to disable debug flags to free up this space? I could miss something.
text data bss dec hex filename
122784 4148 7340 134272 20c80 spe-freertos-bsp/src/out/t23x/spe.elf
Hello,
Basically, SPE R5 firmware only runs on TCM, which is 256KB.
It’s true that SPE R5 can also access DRAM, after correct mapping, but there’re still some issues.
Basic firmware should still run from TCM. Firmware loading/running will be complicated to separate FW binary into two parts (TCM + DRAM).
SPE FW keeps running in SC7. It may fail for DRAM accessing.
SPE R5 is limited in performance. And it’s better to keep it within TCM.
DRAM is only used for data exchange between SPE R5 and CCPLEX.
It makes sense to me, Is there any example how to correctly map DRAM? We don’t use any sleep mode so I think I can try to use DRAM.
And how about compiling without the debug flags(. debug_str)?
Hello, lukasz.przybylik.td:
That’s an advanced question for SPE firmware. Sorry that there’s no existing sample for your purpose, and also is out of support scope.
Default DRAM is for message exchange (rt-aux-cpu-demo-fsp/doc/ivc.md).
The mapping code lies in rt-aux-cpu-demo-fsp/drivers/ivc-channels.c
You can cross-check with corresponding Linux driver for the carve out memory.
I’ve made some tests years ago personally, but could not remember the details. Just for your reference.
Just carve-out and map more DRAM, like 8MB.
Make a code clip, compile and link against DRAM-mapped base. (sorry that I really forgot the exact steps for so many years. Maybe you can specify a new data section, in DRAM, with code/data, and code-clip can run in that section.)
Write a driver to download the code clip to desired block. (it’s more like a loader.)
In SPE firmware, add a command to call the api in code clip.
The basic routine (I remembered some print code added) and return should work.
As to debug_str, that’s a common gcc compile problem.
Per my understanding, the actual downloaded binary should not contain that.
Default SPE code size is about 12x KB.