What is the slowest frequency that the EXTPERIPH1_CLK / MCLK02 output can be run at? If I can change the clock source to the “ck32khz_IB” as indicated in the Parker TRM (note: this table 17 does not appear in the Xavier TRM), and set the divisor to the largest value, I believe it’s 32kHz/[(255/2)+1] = 249Hz. Is this correct?
Assuming the info in the Parker TRM still applies to the Xavier, can the PADCTL_CAM_CFG2TMC_EXTPERIPH1_CLK_0 be used to slow the rate even further? I can’t locate documentation on what the “CFG_CAL_DRVUP” and “CFG_CAL_DRVDN” settings do and am wondering if they might be useful.
Ideally, I’d like the hardware to drive a 10Hz PWM signal out of the MCLK02 / EXTPERIPH1_CLK pin. Right now, I’m doing that in software by configuring that pin as a GPIO and utilizing Linux’s hrtimers functionality. Unfortunately, this approach is inducing an occasional jitter effect on our frame capture. The hope is that if we can offload this to hardware, we’ll eliminate the jitter we’re seeing.