Flashing Jetson Nano Fails After Changing Pinmux Configuration

Autonomous Machines Jetson & Embedded Systems Jetson Nano
,
#1

I am trying to flash a Jetson Nano Devkit (p3450) after changing the pinmux configuration to enable internal pullups and bidirectional communication on all GPIO pins that had that option available on the pinmux spreadsheet. I am trying to flash it with Jetpack 4.3 (L4T r32.3.1) using a host machine running Ubuntu 18.04 and am following the instructions found here (pinmux configuration). I have made sure to change the L4T version number to 32.3.1 everywhere where it is relevant in the procedure. After completing all of the steps and running flash.sh with the parameters stated in the ddocument, the flashing process stalls at this point:

~/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra$ sudo ./flash.sh jetson-nano-qspi-sd mmcblk0p1
###############################################################################
# L4T BSP Information:
# R32 , REVISION: 3.1
###############################################################################
# Target Board Information:
# Name: jetson-nano-qspi-sd, Board Family: t210ref, SoC: Tegra 210, 
# OpMode: production, Boot Authentication: , 
###############################################################################
./tegraflash.py --chip 0x21 --applet "/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/nvtboot_recovery.bin" --skipuid --cmd "dump eeprom boardinfo cvm.bin" 
Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0014 ] Generating RCM messages
[   0.0020 ] tegrarcm --listrcm rcm_list.xml --chip 0x21 0 --download rcm /home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/nvtboot_recovery.bin 0 0
[   0.0026 ] RCM 0 is saved as rcm_0.rcm
[   0.0047 ] RCM 1 is saved as rcm_1.rcm
[   0.0047 ] List of rcm files are saved in rcm_list.xml
[   0.0047 ] 
[   0.0047 ] Signing RCM messages
[   0.0071 ] tegrasign --key None --list rcm_list.xml --pubkeyhash pub_key.key
[   0.0076 ] Assuming zero filled SBK key
[   0.0211 ] 
[   0.0211 ] Copying signature to RCM mesages
[   0.0218 ] tegrarcm --chip 0x21 0 --updatesig rcm_list_signed.xml
[   0.0226 ] 
[   0.0227 ] Boot Rom communication
[   0.0232 ] tegrarcm --chip 0x21 0 --rcm rcm_list_signed.xml --skipuid
[   0.0237 ] RCM version 0X210001
[   0.2733 ] Boot Rom communication completed
[   1.2806 ] 
[   1.2808 ] dump EEPROM info
[   1.2858 ] tegrarcm --oem platformdetails eeprom /home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/cvm.bin
[   1.2894 ] Applet version 00.01.0000
[   1.4998 ] Saved platform info in /home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/cvm.bin
[   1.5752 ] 
Board ID(3448) version(400) 
copying bctfile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/t210ref/BCT/P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.cfg)... done.
copying bootloader(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/t210ref/cboot.bin)... done.
copying initrd(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/l4t_initrd.img)... done.
	populating kernel to rootfs... done.
	populating initrd to rootfs... done.
	populating /home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/kernel/dtb/tegra210-p3448-0000-p3449-0000-b00.dtb to rootfs... done.
Making Boot image... done.
Existing sosfile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/nvtboot_recovery.bin) reused.
copying tegraboot(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/t210ref/nvtboot.bin)... done.
copying cpu_bootloader(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/t210ref/cboot.bin)... done.
copying bpffile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/t210ref/sc7entry-firmware.bin)... done.
Existing badpagefile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/badpage.bin) reused.
copying wb0boot(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/t210ref/warmboot.bin)... done.
Existing tosfile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/tos-mon-only.img) reused.
Existing eksfile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/eks.img) reused.
copying dtbfile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/kernel/dtb/tegra210-p3448-0000-p3449-0000-b00.dtb)... done.
Copying nv_boot_control.conf to rootfs
Making system.img... 
	populating rootfs from /home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/rootfs ... done.
	populating /boot/extlinux/extlinux.conf ... done.
	Sync'ing system.img ... done.
	Converting RAW image to Sparse image... done.
system.img built successfully. 
Existing tbcfile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/nvtboot_cpu.bin) reused.
copying tbcdtbfile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/kernel/dtb/tegra210-p3448-0000-p3449-0000-b00.dtb)... done.
copying cfgfile(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/t210ref/cfg/flash_l4t_t210_spi_p3448.xml) to flash.xml... done.
copying flasher(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/t210ref/cboot.bin)... done.
Existing flashapp(/home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/tegraflash.py) reused.
./tegraflash.py --bl cboot.bin --bct  P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.cfg --odmdata 0x94000 --bldtb tegra210-p3448-0000-p3449-0000-b00.dtb --applet nvtboot_recovery.bin --cmd "flash; reboot"  --cfg flash.xml --chip 0x21    --bins "EBT cboot.bin; DTB tegra210-p3448-0000-p3449-0000-b00.dtb" 
saving flash command in /home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/flashcmd.txt
saving Windows flash command to /home/Downloads/Tegra210_Linux_R32.3.1_aarch64/Linux_for_Tegra/bootloader/flash_win.bat
*** Flashing target device started. ***
Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0040 ] tegrasign --key None --getmode mode.txt
[   0.0047 ] Assuming zero filled SBK key
[   0.0157 ] 
[   0.0158 ] Generating RCM messages
[   0.0187 ] tegrarcm --listrcm rcm_list.xml --chip 0x21 0 --download rcm nvtboot_recovery.bin 0 0
[   0.0192 ] RCM 0 is saved as rcm_0.rcm
[   0.0268 ] RCM 1 is saved as rcm_1.rcm
[   0.0268 ] List of rcm files are saved in rcm_list.xml
[   0.0268 ] 
[   0.0268 ] Signing RCM messages
[   0.0275 ] tegrasign --key None --list rcm_list.xml --pubkeyhash pub_key.key
[   0.0280 ] Assuming zero filled SBK key
[   0.0317 ] 
[   0.0317 ] Copying signature to RCM mesages
[   0.0323 ] tegrarcm --chip 0x21 0 --updatesig rcm_list_signed.xml
[   0.0332 ] 
[   0.0333 ] Parsing partition layout
[   0.0363 ] tegraparser --pt flash.xml.tmp
[   0.0437 ] 
[   0.0437 ] Creating list of images to be signed
[   0.0515 ] tegrahost --chip 0x21 0 --partitionlayout flash.xml.bin --list images_list.xml
[   0.0602 ] 
[   0.0603 ] Generating signatures
[   0.0609 ] tegrasign --key None --list images_list.xml --pubkeyhash pub_key.key
[   0.0615 ] Assuming zero filled SBK key
[   0.0710 ] 
[   0.0711 ] Generating br-bct
[   0.0750 ] tegrabct --bct P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.cfg --chip 0x21 0
[   0.0757 ] Copying Sdram info from 0 to 1 set
[   0.0854 ] Copying Sdram info from 1 to 2 set
[   0.0854 ] Copying Sdram info from 2 to 3 set
[   0.0854 ] 
[   0.0854 ] Updating boot device parameters
[   0.0861 ] tegrabct --bct P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatedevparam flash.xml.bin
[   0.0866 ] Warning: No sdram params
[   0.0867 ] 
[   0.0868 ] Updating bl info
[   0.0874 ] tegrabct --bct P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updateblinfo flash.xml.bin --updatesig images_list_signed.xml
[   0.0882 ] 
[   0.0882 ] Updating secondary storage information into bct
[   0.0887 ] tegraparser --pt flash.xml.bin --chip 0x21 0 --updatecustinfo P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.bct
[   0.0894 ] 
[   0.0894 ] Updating Odmdata
[   0.0899 ] tegrabct --bct P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatefields Odmdata =0x94000
[   0.0904 ] Warning: No sdram params
[   0.0905 ] 
[   0.0905 ] Get Signed section of bct
[   0.0910 ] tegrabct --bct P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.bct --chip 0x21 0 --listbct bct_list.xml
[   0.0916 ] 
[   0.0917 ] Signing BCT
[   0.0928 ] tegrasign --key None --list bct_list.xml --pubkeyhash pub_key.key
[   0.0934 ] Assuming zero filled SBK key
[   0.0937 ] 
[   0.0937 ] Updating BCT with signature
[   0.0945 ] tegrabct --bct P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatesig bct_list_signed.xml
[   0.0953 ] 
[   0.0954 ] Copying signatures
[   0.0960 ] tegrahost --chip 0x21 0 --partitionlayout flash.xml.bin --updatesig images_list_signed.xml
[   0.0980 ] 
[   0.0980 ] Updating BFS information on BCT
[   0.0989 ] tegrabct --bct P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatebfsinfo flash.xml.bin
[   0.0998 ] 
[   0.0999 ] Boot Rom communication
[   0.1004 ] tegrarcm --chip 0x21 0 --rcm rcm_list_signed.xml
[   0.1009 ] BootRom is not running
[   0.2494 ] 
[   0.2494 ] Sending BCTs
[   0.2501 ] tegrarcm --download bct P3448_A00_4GB_Micron_4GB_lpddr4_204Mhz_P987.bct
[   0.2507 ] Applet version 00.01.0000
[   0.4628 ] Sending bct
[   0.4628 ] [................................................] 100%
[   0.6397 ] 
[   0.6404 ] tegrahost --chip 0x21 --align cboot.bin
[   0.6410 ] 
[   0.6417 ] tegrahost --magicid EBT --appendsigheader cboot.bin cboot.bin_blheader
[   0.6431 ] 
[   0.6438 ] tegrasign --key None --list cboot.bin_list.xml
[   0.6443 ] Assuming zero filled SBK key
[   0.6541 ] 
[   0.6550 ] tegrahost --updatesigheader cboot.bin_blheader.encrypt cboot.bin_blheader.hash zerosbk
[   0.6561 ] 
[   0.6570 ] tegrahost --chip 0x21 --align tegra210-p3448-0000-p3449-0000-b00.dtb
[   0.6576 ] 
[   0.6582 ] tegrahost --magicid DTB --appendsigheader tegra210-p3448-0000-p3449-0000-b00.dtb tegra210-p3448-0000-p3449-0000-b00.dtb_blheader
[   0.6593 ] 
[   0.6600 ] tegrasign --key None --list tegra210-p3448-0000-p3449-0000-b00.dtb_list.xml
[   0.6605 ] Assuming zero filled SBK key
[   0.6647 ] 
[   0.6655 ] tegrahost --updatesigheader tegra210-p3448-0000-p3449-0000-b00.dtb_blheader.encrypt tegra210-p3448-0000-p3449-0000-b00.dtb_blheader.hash zerosbk
[   0.6665 ] 
[   0.6667 ] Sending bootloader and pre-requisite binaries
[   0.6672 ] tegrarcm --download ebt cboot.bin.encrypt 0 0 --download rp1 tegra210-p3448-0000-p3449-0000-b00.dtb.encrypt 0
[   0.6677 ] Applet version 00.01.0000
[   0.8747 ] Sending ebt
[   0.8749 ] [................................................] 100%
[   0.9771 ] Sending rp1
[   0.9819 ] [................................................] 100%
[   1.0318 ] 
[   1.0325 ] tegrarcm --boot recovery
[   1.0329 ] Applet version 00.01.0000
[   1.2439 ] 
[   1.2439 ] Retrieving storage infomation
[   1.2446 ] tegrarcm --oem platformdetails storage storage_info.bin
[   1.2451 ] Applet is not running on device. Continue with Bootloader
[   628.98 ] 
[   629.14 ] tegradevflash --oem platformdetails storage storage_info.bin
[   629.51 ] Cboot version 00.01.0000
[   629.86 ] Saved platform info in storage_info.bin

After this, the power LED on the board turns off and the flash process hangs indefinitely but does not give an error message. I have also tried running flash.sh with multiple other combinations of parameters but get the same result. I have also tried running the image generator in the tools directory and flashing that image directly to the SD card using etcher but the Nano fails to boot after flashing with this method. I have also tried repeating the process using a different Nano, a different SD card, and a different micro USB cable so none of those are the source of the problem. Does anyone have any ideas on how to fix this issue?

#2

UPDATE: I tried flashing an unmodified version of Jetpack and that worked with no issues. I read (here) that the pinmux spreadsheet often produces incorrect .dtsi and .h files for pinmux configuration. Does anyone know a good workaround for this? The modifications I am trying to make to pinmux are:
1: Set all available pins to bidirectional GPIO mode (all pins on the spreadsheet with those dropdown options available)
2: Enable internal pull-up on all available pins (all pins on the spreadsheet with that dropdown options available)
3. Set boot device to QSPI (default is eMMc on the spreadsheet)

Any advice on how to properly create the .dtsi and .h files or existing versions of these files for this configuration would be greatly appreciated. Also, I cannot use Jetson IO for this because, as far as I can tell, it does not provide the option to enable internal pull-up.

Jetson Nano Pinmux Questions
#3

What is the spreadsheet file you are using? Not sure why we have “emmc” on the spreadsheet.

#4

I am using Jetson Nano Developer Kit Pinmux version 1.01 found here (nano downloads).

#5

I don’t think what you are doing here is correct. You should match the pinmux to your hardware design. But not just set anything to gpio without understanding what yourself is doing.

And obviously, you don’t have a hardware design, Your hardware is just the Nano devkit.

For Nano devkit, I only suggest you to set those pins over the 40 pin header.

#6

Are the pins listed on the spreadsheet not all on the 40 pin header? They all have 40 pin header pin numbers in column C of the spreadsheet so I assumed they were. I have noticed several “hidden rows” on the spreadsheet that appear when I adjust the height of rows before a row number jump and these do not have 40 pin header numbers but I have not modified any of these and made sure to use a fresh version of the spreadsheet after accidentally making some of them appear.

#7

If you only modified 40 pin header pins, how about you just check things step by step?

For example, back to the default pinmux, only change the boot device and flash it. If it is okay, then change about 10 pins each time and flash. See which pin is causing your problem.

#8

I will give that a try and update with the results. Thank you.

#9

Sorry that I just notice you might use different file.

Can you check you are using "Jetson Nano Developer Kit Pinmux " but not "Jetson Nano Pinmux "?

#10

I managed to get the Nano to flash with the updated pinmux. It turns out I had version 1.0 of the pinmux spreadsheet on my Windows computer. The nano flashes and boots but none of the internal pull-up resistors seem to be enabled despite me enabling all available internal pull-ups on the 40 pin header in the pinmux spreadsheet. I have verified that the modifications I made to the pinmux spreadsheet are reflected in the header file and two dtsi files used in the pinmux configuration tutorial, and verified that even with internal pull-up set to enable on a given pin in these files, the internal pull-up resistor was not enabled on the board itself after the flash for that pin. I have also tried flashing both with and without running

sudo ./apply_binaries

Does anyone have any ideas as to why the pinmux changes are not reflected on the flashed Nano?

#11

Can you compare the dtsi files before and after you set the internal pull-up set in the spreadsheet?

#12

This is the diff of the pinmux dtsi:

354a355,406
> 			gen1_i2c_scl_pj1 {
> 				nvidia,pins = "gen1_i2c_scl_pj1";
> 				nvidia,function = "i2c1";
> 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
> 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
> 				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
> 			};
> 
> 			gen1_i2c_sda_pj0 {
> 				nvidia,pins = "gen1_i2c_sda_pj0";
> 				nvidia,function = "i2c1";
> 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
> 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
> 				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
> 			};
> 
> 			gen2_i2c_scl_pj2 {
> 				nvidia,pins = "gen2_i2c_scl_pj2";
> 				nvidia,function = "i2c2";
> 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
> 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
> 				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
> 			};
> 
> 			gen2_i2c_sda_pj3 {
> 				nvidia,pins = "gen2_i2c_sda_pj3";
> 				nvidia,function = "i2c2";
> 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
> 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
> 				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
> 			};
> 
> 			uart2_tx_pg0 {
> 				nvidia,pins = "uart2_tx_pg0";
> 				nvidia,function = "uartb";
> 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
> 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
> 			};
> 
> 			uart2_rx_pg1 {
> 				nvidia,pins = "uart2_rx_pg1";
> 				nvidia,function = "uartb";
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
> 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
> 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
> 			};
> 
561c613
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
569c621
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
577c629
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
585c637
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
593c645
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
601c653
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
689c741
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
697c749
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
737c789
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
745c797
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
753c805
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
761,813c813
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
< 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
< 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
< 			};
< 
< 			gen1_i2c_scl_pj1 {
< 				nvidia,pins = "gen1_i2c_scl_pj1";
< 				nvidia,function = "rsvd1";
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
< 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
< 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
< 				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
< 			};
< 
< 			gen1_i2c_sda_pj0 {
< 				nvidia,pins = "gen1_i2c_sda_pj0";
< 				nvidia,function = "rsvd1";
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
< 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
< 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
< 				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
< 			};
< 
< 			gen2_i2c_scl_pj2 {
< 				nvidia,pins = "gen2_i2c_scl_pj2";
< 				nvidia,function = "rsvd1";
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
< 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
< 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
< 				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
< 			};
< 
< 			gen2_i2c_sda_pj3 {
< 				nvidia,pins = "gen2_i2c_sda_pj3";
< 				nvidia,function = "rsvd1";
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
< 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
< 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
< 				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
< 			};
< 
< 			uart2_tx_pg0 {
< 				nvidia,pins = "uart2_tx_pg0";
< 				nvidia,function = "uartb";
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
< 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
< 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
< 			};
< 
< 			uart2_rx_pg1 {
< 				nvidia,pins = "uart2_rx_pg1";
< 				nvidia,function = "uartb";
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
821c821
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
829c829
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
837c837
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
845c845
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
853c853
< 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
---
> 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;

This is the diff of the gpio-default dtsi:

51,56d50
< 				TEGRA_GPIO(J, 1)
< 				TEGRA_GPIO(J, 0)
< 				TEGRA_GPIO(J, 2)
< 				TEGRA_GPIO(J, 3)
< 				TEGRA_GPIO(G, 0)
< 				TEGRA_GPIO(G, 1)
#13

Can you go to /proc/device-tree on your board and check if your change is really taking effect there?

#14

How should I go about checking if the change has taken effect there? I only see binary files in the device-tree directory and its subdirectories.

Also, to test if internal pull-up is enabled I have been using a simple input program with Jetson.GPIO to read the value of a pin and checking if it is HIGH to start, then goes low if a jumper is added between that pin and ground. Is this a valid way to verify?

#15

That is why I gave you a path and asked you to check over there… it is not a binary. /proc/device-tree is the whole device tree structure… Use “xxd” command to dump the node and it will give out the hex value for you…

For example, before your dts taking affect, nvidia,pull should be TEGRA_PIN_PULL_DOWN. And after your change, it shall be TEGRA_PIN_PULL_UP.

#16