Forcing TX2 PCIe bus to remain powered on

Robotics & Edge Computing Jetson & Embedded Systems Jetson TX2
1

I found this discussion about keep the pcie bus powered on.

https://devtalk.nvidia.com/default/topic/1049932/jetson-tx2/pcie-signal-connections-for-help/post/5356731/#5356731

Can you please provide the patch to enable power on for rel 32.3.1.

I have a custom carrier card with TX2i which does not recognize an Intel e1000e based NIC.
The pcie bus remains powered off, so we cannot use a scope to analyze the bus.

[ 1.237945] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
[ 1.237950] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
[ 1.238009] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.4.0-k
[ 1.238014] igb: Copyright (c) 2007-2014 Intel Corporation.
The eval board recognizes the NIC at this point and brings up the connections

[ 1.238049] igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.4.0-k
[ 1.238053] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
[ 1.238092] Intel(R) 10GbE PCI Express Linux Network Driver - version 4.6.4
[ 1.238096] Copyright(c) 1999 - 2017 Intel Corporation.

2

I found this older comment that provides a patch for an unspecified release

https://devtalk.nvidia.com/default/topic/1038787/jetson-tx2/question-about-pcie-reset/post/5279969/#5279969

3

The R32.3.1 code is

list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
                if (tegra_pcie_port_check_link(port)) {
                        port->status = 1;
                        port->ep_status = 1;
                        pcie->num_ports++;
                        tegra_pcie_update_lane_width(port);
                        tegra_pcie_update_pads2plle(port);
                        continue;
                }
                port->ep_status = 0;
                dev_info(pcie->dev, "link %u down, ignoring\n", port->index);
                tegra_pcie_port_disable(port);
        }

I have no knowledge of Linux PCI drivers, but would seem that the code should be changed so tegra_pcie_port_disable(port); is not called.

5

Are you saying that you are not able to apply the above patch?

6

I had two questions:

  1. Can you provide the patch referenced https://devtalk.nvidia.com/default/topic/1049932/jetson-tx2/pcie-signal-connections-for-help/post/5356731/#5356731
  2. Is my proposed patch the correct approach to have the pcei bus remain enabled?
    i.e. need information on how the drivers works.
7

Please use the below patch and recompile the kernel

diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 63c0e343d388..52c46b68981e 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -2194,7 +2194,7 @@ static bool tegra_pcie_port_check_link(struct tegra_pcie_port *port)
                tegra_pcie_port_reset(port);
        } while (--retries);
 
-       return false;
+       return true;
 }
 
 static void tegra_pcie_apply_sw_war(struct tegra_pcie_port *port,

Copy the updated Image to /boot/Image on the target. With this, you should be able to have root ports alive even without PCIe link up.