Fpga as pcie ep transfer data with DMA to TX2 ram

Hi, all
We have trouble in making ep transfer data with dma to TX2 ram.

I have learned that it is supported that ep can transfer data
with dma to TX2 local ddr.

We use cyclone5 fpag as pcie ep, and it is ok for Tx2
as rc to read and write data to bar.

But we meet some problem when want to
make ep transfer data directly to TX2 ram.

In the fpga there are A2P_ADDR_MAP_LO0 and A2P_ADDR_HI0 register, which we can configure them with bar. When these registers are written the correct Tx2 address, then the ep to TX2 ram adddress is mapped

In theory , we can use dma (ip core in fpga) to transfer data to tx2 ram

But we have below uart message when start transfering

BlockquoteCPU3: SError detected, daif=1c0, spsr=0x800000c5, mpidr=80000101, esr=bf40c000
[ 2342.272422] CPU5: SError detected, daif=1c0, spsr=0x800000c5, mpidr=80000103, esr=bf40c000
[ 2342.369260] CPU4: SError detected, daif=1c0, spsr=0x800000c5, mpidr=80000102, esr=bf40c000
[ 2342.369269] CPU2: SError detected, daif=1c0, spsr=0x800000c5, mpidr=80000001, esr=be000000
[ 2342.369368] CPU1: SError detected, daif=140, spsr=0x40000045, mpidr=80000000, esr=be000000
[ 2342.466101] tegra-pcie 10003000.pcie-controller: PCIE: Transcation timeout, signature: dead2009
[ 2342.466227] ROC:CCE Machine Check Error:
[ 2342.466415] ROC:IOB Machine Check Error:
[ 2342.562953] CPU5: SError detected, daif=1c0, spsr=0xc5, mpidr=80000103, esr=bf40c000
[ 2342.659933] ROC:IOB Machine Check Error:
[ 2342.663968] CPU4: SError detected, daif=1c0, spsr=0x800000c5, mpidr=80000102, esr=bf000002
[ 2342.853567] ROC:IOB Machine Check Error:
[ 2342.853666] **************************************
[ 2342.853667] Machine check error in DCC:1:
[ 2342.853669] Status = 0xf400000100000405
[ 2342.853670] Bank does not have any known errors
[ 2342.853672] Overflow (there may be more errors)
[ 2342.853673] Uncorrected (this is fatal)
[ 2342.853675] Error reporting enabled when error arrived
[ 2342.853677] ADDR = 0xb0
[ 2342.950312] **************************************
[ 2342.950313] CPU2: SError detected, daif=1c0, spsr=0x400000c5, mpidr=80000001, esr=be000000
[ 2343.144076] ROC:IOB Machine Check Error:
[ 2343.337775] CPU1: SError detected, daif=140, spsr=0x80000000, mpidr=80000000, esr=be000000
[ 2343.337854] ROC:CCE Machine Check Error:
[ 2343.338005] ROC:IOB Machine Check Error:
[ 2343.338063] CPU5: SError detected, daif=1c0, spsr=0xc5, mpidr=80000103, esr=bf000002
[ 2343.434558] tegra-pcie 10003000.pcie-controller: PCIE: Transcation timeout, signature: dead2009
[ 2343.434706] ROC:IOB Machine Check Error:
[ 2343.434782] CPU3: SError detected, daif=1c0, spsr=0x800000c5, mpidr=80000101, esr=bf000002

It is appreciated for any suggestion to make it

How is the buffer (the address of which is written into the registers A2P_ADDR_MAP_LO0 and A2P_ADDR_HI0) being allocated in the endpoint’s device driver?

Hi, vidyas
Thanks for you help

dma_handle from dma_alloc_conherent function can achieve it.

writing dam_handle to A2P_ADDR_MAP_LO0 is ok

We just configure the wrong data width to register in DMA ip core which lead us to the problem.

Thanks