# FreeRTOS and Sensor Processing Engine
**URL:** https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756
**Category:** Jetson AGX Xavier
**Tags:** spe
**Created:** [April 23, 2020, 4:02am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756 "2020-04-23T04:02:13Z")
**Posts on this page:** 13
**Page:** 1
### Author:  [@saurabh.agrawalmlc27](https://forums.developer.nvidia.com/u/saurabh.agrawalmlc27)
#### Post date: [April 23, 2020, 4:02am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/1 "2020-04-23T04:02:13Z")
Hello,
I am trying to learn to use the SPE on Xavier. I have Ubuntu 18.04 Host system on which I have the SPE and the freeRTOS project directories.
What I want to understand is that
1. When I flash the SPE.bin will it flash only the Cortex-R5 or will it flash the xavier completely?
2. How do I setup a simulation environment on host to ensure logical correctness of my code? Which IDE can I use? Can you share the config file for the Arm cortex-r5 device on Xaveir?
3. Is there a bit more detailed Document with an end to end implementation of a sample program?
This is did till now
1. Uses SDKManager to download the tools and software. this created the download directory and the install directory.
2. Followed the steps in md\_rt-aux-cpu-demo\_doc\_uart.html
Check SCR values as below in the file tegra194-mb1-bct-scr-cbb-mini.cfg:
scr.2609.6 = 0x18001616; # AON\_NOC\_UARTG\_BLF\_CONTROL\_REGISTER\_0
Check default pinmux configuration as below in the file tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg.
pinmux.0x0c302048 = 0x00000401; # spi2\_sck\_pcc0: uartg,
pinmux.0x0c302050 = 0x00000459; # spi2\_miso\_pcc1: uartg,
3. Now I compiled following the step given in rt-compiling.html
make TARGET=t19x
Back up the original copies of spe.bin and spe\_t194.bin located in the following directory: Linux\_for\_Tegra/bootloader/
Copy the generated ${OUTDIR}/spe.bin to the following locating, depending on your target. For the Jetson AGX target, copy it to:
Linux\_for\_Tegra/bootloader/spe\_t194.bin
4. Now I flashed the Xavier using
sudo ./flash.sh -k spe-fw jetson-xavier mmcblk0p1
I got this message after flashing
\*\*\*\*\* The [spe-fw] has been updated successfully. \*\*\*\*\*
5. Now how do I check UART port. As per the md\_rt-aux-cpu-demo\_doc\_uart.html, I should get “Message from SPE R5 UART”. But I am not how where and how to see this message.
Please guide me through one end to end sample application implementation for UART. Do let me know for any clarity needed.
Thanks
Saurabh
---
### Author:  [@jachen](https://forums.developer.nvidia.com/u/jachen)
#### Post date: [April 23, 2020, 6:10am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/3 "2020-04-23T06:10:01Z")
1. if you flash the device by sudo ./flash.sh -k spe-fw jetson- mmcblk0p1, only spe firmware partition will be updated.
2. no such sim env for that R5.
3. all docs are in doc directory.
After you change the ./bootloader/t186ref/BCT/tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg, you have to flash the whole device to make it work.
sudo ./flash.sh -k spe-fw jetson-xavier mmcblk0p1 just updated SPE-FW partition and did not change BCT\_CFG.
br
ChenJian
---
### Author:  [@saurabh.agrawalmlc27](https://forums.developer.nvidia.com/u/saurabh.agrawalmlc27)
#### Post date: [April 23, 2020, 8:47am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/4 "2020-04-23T08:47:49Z")
Hello Jachen,
Thank you for your response. [quote=“jachen, post:3, topic:120756”]
tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg
[/quote]
Thanks for your swift response.
Flashing the whole device meaning flashing using sdkmanager? is there a command line flash the board?
I tried flashing the board using
./flash.sh jetson-xavier mmcblk0p1
but was not successful… as it throws an error “Error: Invalid target board - jetson-xavier.”
> [@saurabh.agrawalmlc27](#):
>
> This is did till now
>
> 1. Uses SDKManager to download the tools and software. this created the download directory and the install directory.
> 2. Followed the steps in md\_rt-aux-cpu-demo\_doc\_uart.html
> Check SCR values as below in the file tegra194-mb1-bct-scr-cbb-mini.cfg:
> scr.2609.6 = 0x18001616; # AON\_NOC\_UARTG\_BLF\_CONTROL\_REGISTER\_0
> Check default pinmux configuration as below in the file tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg.
> pinmux.0x0c302048 = 0x00000401; # spi2\_sck\_pcc0: uartg,
> pinmux.0x0c302050 = 0x00000459; # spi2\_miso\_pcc1: uartg,also modified l4t-rt/rt-aux-cpu-demo/soc/t19x/target\_specific.mk
>
> # Enable = 1/Disable = 0 UART sample app
>
> ```auto
> ENABLE_UART_APP := 1
>
> ```
>
> 1. Now I compiled following the step given in rt-compiling.html
> make TARGET=t19x
> Back up the original copies of spe.bin and spe\_t194.bin located in the following directory: Linux\_for\_Tegra/bootloader/
> Copy the generated ${OUTDIR}/spe.bin to the following locating, depending on your target. For the Jetson AGX target, copy it to:
> Linux\_for\_Tegra/bootloader/spe\_t194.bin
> 2. Now I flashed the Xavier using
> sudo ./flash.sh -k spe-fw jetson-xavier mmcblk0p1
> I got this message after flashing
> 5.\*\*\*\* The [spe-fw] has been updated successfully. \*\*\*\*\*
> 3. Now how do I check UART port. As per the md\_rt-aux-cpu-demo\_doc\_uart.html, I should get “Message from SPE R5 UART”. But I am not how where and how to see this message.
Could you please provide your input regarding the above points, am I following the right steps…
> [@saurabh.agrawalmlc27](#):
>
> Please guide me through one end to end sample application implementation for UART.
It will be really very helpful if you could guide me through this.
Thanks
Saurabh
---
### Author:  [@jachen](https://forums.developer.nvidia.com/u/jachen)
#### Post date: [April 24, 2020, 2:21am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/5 "2020-04-24T02:21:38Z")
Hello,
To have more choices for device flash, I recommend using command line flash method instead of SDKManager, which will be more suitable for a one-click installation, but it’s a little tricky if BSP is customized.
You can refer to [Welcome — Jetson Linux\
Developer Guide 34.1 documentation](https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/quick_start.html) for details.
As the error ‘Error: Invalid target board - jetson-xavier’ you met, please check the SDK package you downloaded. The file jetson-xavier.conf should be there in this directory Linux\_for\_Tegra. Meanwhile, you have to run flash command with root.
br
Chenjian
---
### Author:  [@saurabh.agrawalmlc27](https://forums.developer.nvidia.com/u/saurabh.agrawalmlc27)
#### Post date: [April 24, 2020, 5:12am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/6 "2020-04-24T05:12:26Z")
Thanks Jachen.
> [@saurabh.agrawalmlc27](#):
>
> Please guide me through one end to end sample application implementation for UART.
It would be really helpful if you could guide me through one sample as I request earlier too. How and where do I check the UART app is not clear from the documentation.
Looking forward for your help.
Thanks
Saurabh
---
### Author:  [@jachen](https://forums.developer.nvidia.com/u/jachen)
#### Post date: [April 24, 2020, 5:49am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/7 "2020-04-24T05:49:27Z")
Hello,
doc/uart.md has described details about UART application in SPE R5. Xavier part is as follows:
1. Check SCR values as below in the file tegra194-mb1-bct-scr-cbb-mini.cfg:
2. Check default pinmux configuration as below in the file
`tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg`.
3. Compile device tree and flash the entire board to ensure that the SCR,
and pinmux settings are flashed on the board.
4. A simple way to test UARTG function in Jetson AGX board.
br
ChenJian
---
### Author:  [@saurabh.agrawalmlc27](https://forums.developer.nvidia.com/u/saurabh.agrawalmlc27)
#### Post date: [April 24, 2020, 6:44am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/8 "2020-04-24T06:44:20Z")
Hello
> [@jachen](#):
>
> Compile device tree and flash the entire board to ensure that the SCR,
> and pinmux settings are flashed on the board.
How do i Compile the device tree? the compile-flash.md file shows the steps to compile the demo apps and flash the board. The step to compile the device tree are missing I believe.
> [@jachen](#):
>
> 4.2. Use a wire to connect UARTG TX and Rx (in Jetson AGX board, they are
> A5 and A6 in J6), then the following message will output from
The pins A5 and A6 on J6 that is the pcie port, right? this is a little difficult as I dont have any extender board. Can you please suggest any easy way to test UART?
Thanks
Saurabh
> [@jachen](#):
>
> Message from SPE R5 UART
Which app is printing this message? will the Demo application work out of the box if I enable the ENABLE\_UART\_APP to 1 in the .mk file or Do I need to modify the src code to make it work?
Thanks
Saurabh
---
### Author:  [@jachen](https://forums.developer.nvidia.com/u/jachen)
#### Post date: [April 24, 2020, 8:11am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/9 "2020-04-24T08:11:47Z")
Hello,
`How do i Compile the device tree? the compile-flash.md file shows the steps to compile the demo apps and flash the board. The step to compile the device tree are missing I believe.`
Device-tree compile is part of Linux kernel compile. Please refer to [https://docs.nvidia.com/jetson/l4t/#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide%2Fkernel\_custom.html%23wwpID0E02C0HA](https://docs.nvidia.com/jetson/l4t/#page/Tegra%2520Linux%2520Driver%2520Package%2520Development%2520Guide%2Fkernel_custom.html%23wwpID0E02C0HA)
`The pins A5 and A6 on J6 that is the pcie port, right? this is a little difficult as I dont have any extender board. Can you please suggest any easy way to test UART?`
It’s hardware issue. You can stick in a thin wire to debug. No better way per my understanding.
`Which app is printing this message? will the Demo application work out of the box if I enable the ENABLE_UART_APP to 1 in the .mk file or Do I need to modify the src code to make it work?`
You can refer to code at “app/uart-app.c”. You need not modify C source and with correct hardware connection and configuration, you should see the message from debug port.
br
ChenJian
---
### Author:  [@Andrey1984](https://forums.developer.nvidia.com/u/Andrey1984)
#### Post date: [June 26, 2020, 11:54am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/11 "2020-06-26T11:54:12Z")
After I flashed SPE to Xavier AGX with the command below
```auto
sudo ./flash.sh -k spe-fw jetson-xavier mmcblk0p1
```
could you suggest some simple steps to confirm it worked, please?
---
### Author:  [@jachen](https://forums.developer.nvidia.com/u/jachen)
#### Post date: [July 2, 2020, 7:36am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/13 "2020-07-02T07:36:27Z")
Hello, Andrey:
The easiest way is to add some print in SPE firmware and check the output from UART.
br
Chenjian
---
### Author:  [@abdo.babukr](https://forums.developer.nvidia.com/u/abdo.babukr)
#### Post date: [December 16, 2020, 3:25am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/15 "2020-12-16T03:25:16Z")
The UART example works on the TX2 after piecing together the comments from this post. After building the kernel with the configuration (for the application at hand) , building the rtos samples and transfering over the built files to the flashing environment: take out the hook “-k spe-fw” from the flash command.
```auto
sudo ./flash.sh jetson-xavier or jetson-tx2 mmcblk0p1
```
The hook gets added back when changes are made only to the SPE portion:
```auto
sudo ./flash.sh -k spe-fw jetson-xavier or jetson-tx2 mmcblk0p1
```
The printing to the uart,tegra\_uart\_write\_now() , is whats working. Does anyone know what console printf() goes to?
---
### Author:  [@Andrey1984](https://forums.developer.nvidia.com/u/Andrey1984)
#### Post date: [May 18, 2021, 11:19am UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/16 "2021-05-18T11:19:02Z")
currently this command execution is not required, right?
```auto
sudo ./flash.sh -k spe-fw jetson-xavier mmcblk0p1
```
just flashing the pinmux, dtbs will work?
which is the J6 header A5/ A6? it is PCI-e slor, right? but which pins of it exactly needs to be shortcut? which pins of it are the A5/A6 pins?
---
### Author:  [@TomNVIDIA](https://forums.developer.nvidia.com/u/TomNVIDIA)
#### Post date: [October 18, 2021, 6:19pm UTC](https://forums.developer.nvidia.com/t/freertos-and-sensor-processing-engine/120756/17 "2021-10-18T18:19:32Z")