FreeRTOS and Sensor Processing Engine

Hello,

I am trying to learn to use the SPE on Xavier. I have Ubuntu 18.04 Host system on which I have the SPE and the freeRTOS project directories.

What I want to understand is that

  1. When I flash the SPE.bin will it flash only the Cortex-R5 or will it flash the xavier completely?
  2. How do I setup a simulation environment on host to ensure logical correctness of my code? Which IDE can I use? Can you share the config file for the Arm cortex-r5 device on Xaveir?
  3. Is there a bit more detailed Document with an end to end implementation of a sample program?

This is did till now

  1. Uses SDKManager to download the tools and software. this created the download directory and the install directory.

  2. Followed the steps in md_rt-aux-cpu-demo_doc_uart.html
    Check SCR values as below in the file tegra194-mb1-bct-scr-cbb-mini.cfg:
    scr.2609.6 = 0x18001616; # AON_NOC_UARTG_BLF_CONTROL_REGISTER_0
    Check default pinmux configuration as below in the file tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg.
    pinmux.0x0c302048 = 0x00000401; # spi2_sck_pcc0: uartg,
    pinmux.0x0c302050 = 0x00000459; # spi2_miso_pcc1: uartg,

    also modified l4t-rt/rt-aux-cpu-demo/soc/t19x/target_specific.mk

    Enable = 1/Disable = 0 UART sample app

     ENABLE_UART_APP := 1
    
  3. Now I compiled following the step given in rt-compiling.html
    make TARGET=t19x
    Back up the original copies of spe.bin and spe_t194.bin located in the following directory: Linux_for_Tegra/bootloader/
    Copy the generated ${OUTDIR}/spe.bin to the following locating, depending on your target. For the Jetson AGX target, copy it to:
    Linux_for_Tegra/bootloader/spe_t194.bin

  4. Now I flashed the Xavier using
    sudo ./flash.sh -k spe-fw jetson-xavier mmcblk0p1
    I got this message after flashing
    ***** The [spe-fw] has been updated successfully. *****

  5. Now how do I check UART port. As per the md_rt-aux-cpu-demo_doc_uart.html, I should get “Message from SPE R5 UART”. But I am not how where and how to see this message.

Please guide me through one end to end sample application implementation for UART. Do let me know for any clarity needed.

Thanks
Saurabh

  1. if you flash the device by sudo ./flash.sh -k spe-fw jetson- mmcblk0p1, only spe firmware partition will be updated.
  2. no such sim env for that R5.
  3. all docs are in doc directory.

After you change the ./bootloader/t186ref/BCT/tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg, you have to flash the whole device to make it work.
sudo ./flash.sh -k spe-fw jetson-xavier mmcblk0p1 just updated SPE-FW partition and did not change BCT_CFG.

br
ChenJian

Hello Jachen,

Thank you for your response. [quote=“jachen, post:3, topic:120756”]
tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg
[/quote]

Thanks for your swift response.
Flashing the whole device meaning flashing using sdkmanager? is there a command line flash the board?
I tried flashing the board using

./flash.sh jetson-xavier mmcblk0p1

but was not successful… as it throws an error “Error: Invalid target board - jetson-xavier.”

Could you please provide your input regarding the above points, am I following the right steps…

It will be really very helpful if you could guide me through this.

Thanks
Saurabh

Hello,
To have more choices for device flash, I recommend using command line flash method instead of SDKManager, which will be more suitable for a one-click installation, but it’s a little tricky if BSP is customized.
You can refer to https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/quick_start.html for details.
As the error ‘Error: Invalid target board - jetson-xavier’ you met, please check the SDK package you downloaded. The file jetson-xavier.conf should be there in this directory Linux_for_Tegra. Meanwhile, you have to run flash command with root.

br
Chenjian

Thanks Jachen.

It would be really helpful if you could guide me through one sample as I request earlier too. How and where do I check the UART app is not clear from the documentation.

Looking forward for your help.

Thanks
Saurabh

Hello,
doc/uart.md has described details about UART application in SPE R5. Xavier part is as follows:

  1. Check SCR values as below in the file tegra194-mb1-bct-scr-cbb-mini.cfg:

    scr.2609.6 = 0x18001616; # AON_NOC_UARTG_BLF_CONTROL_REGISTER_0
    
  2. Check default pinmux configuration as below in the file
    tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg.

    pinmux.0x0c302048 = 0x00000401; # spi2_sck_pcc0: uartg,
    pinmux.0x0c302050 = 0x00000459; # spi2_miso_pcc1: uartg,
    
  3. Compile device tree and flash the entire board to ensure that the SCR,
    and pinmux settings are flashed on the board.

    After the UART test task runs, it will continuously output following messages
    to desired UART port:

    Message from SPE R5 UART
    

    It will also print received characters to debug port.

  4. A simple way to test UARTG function in Jetson AGX board.

    4.1. Follow above steps from 1 to 3 and power up the device.

    4.2. Use a wire to connect UARTG TX and Rx (in Jetson AGX board, they are
    A5 and A6 in J6), then the following message will output from
    SPE firmware debug UART port:

       Message from SPE R5 UART
    

br
ChenJian

Hello

How do i Compile the device tree? the compile-flash.md file shows the steps to compile the demo apps and flash the board. The step to compile the device tree are missing I believe.

The pins A5 and A6 on J6 that is the pcie port, right? this is a little difficult as I dont have any extender board. Can you please suggest any easy way to test UART?

Thanks
Saurabh

Which app is printing this message? will the Demo application work out of the box if I enable the ENABLE_UART_APP to 1 in the .mk file or Do I need to modify the src code to make it work?

Thanks
Saurabh

Hello,
How do i Compile the device tree? the compile-flash.md file shows the steps to compile the demo apps and flash the board. The step to compile the device tree are missing I believe.
Device-tree compile is part of Linux kernel compile. Please refer to https://docs.nvidia.com/jetson/l4t/#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide%2Fkernel_custom.html%23wwpID0E02C0HA
The pins A5 and A6 on J6 that is the pcie port, right? this is a little difficult as I dont have any extender board. Can you please suggest any easy way to test UART?
Its hardware issue. You can stick in a thin wire to debug. No better way per my understanding.
Which app is printing this message? will the Demo application work out of the box if I enable the ENABLE_UART_APP to 1 in the .mk file or Do I need to modify the src code to make it work?
You can refer to code at app/uart-app.c. You need not modify C source and with correct hardware connection and configuration, you should see the message from debug port.

br
ChenJian

1 Like

After I flashed SPE to Xavier AGX with the command below

sudo ./flash.sh -k spe-fw jetson-xavier mmcblk0p1

could you suggest some simple steps to confirm it worked, please?

Hello, Andrey:
The easiest way is to add some print in SPE firmware and check the output from UART.

br
Chenjian