GPIO and Interrupts

I am attempting to use a raspberry pi HAT on the nano. I need two GPIO’s (pins 22 and 36) configured as interrupts (the HAT uses them to signal data is ready to read from SPI). I am only using SPI0 so those pins are currently unused on the nano.

I assume I will need to make some DTS changes, which is fine, but I have no idea on exactly which changes need to be made.

I have been searching for about 7 hours now and cannot find any documentation on how this is done.

Can someone enlighten me?

Check the PINMUX spreadsheet here (you might need to go there, log in, and then go there again):
https://developer.nvidia.com/embedded/downloads#?search=pinmux&tx=$product,jetson_nano

This would build a new device tree for you which you could install.

I did, and I can’t figure out how to tie a gpio to an interrupt (although things are starting to make a little more sense).

Here is the actual dts I’m working with:

/dts-v1/;

/ {
	overlay-name = "MCP25xxFD CAN Controller";
    compatible = "nvidia,p3449-0000-b00+p3448-0000-b00", "nvidia,p3449-0000-a02+p3448-0000-a02";

	fragment@0 {
		target-path = "/";

		__overlay__ {

			clocks {

				can_clock {
					compatible = "fixed-clock";
					#clock-cells = <0x00>;
					clock-frequency = <0x1312d00>;
					clock-accuracy = <0x64>;
					linux,phandle = <0x01>;
					phandle = <0x01>;
				};
			};
		};
	};

	fragment@1 {
		target = <0xffffffff>;

		__overlay__ {

			spi@0 {
				compatible = "microchip,mcp25xxfd";
				reg = <0x00>;
				spi-max-frequency = <0x989680>;
				nvidia,enable-hw-based-cs;
				nvidia,rx-clk-tap-delay = <0x07>;
				clocks = <0x01>;
				interrupts = <0xffffffff 0xc8 0x01>;

				controller-data {
					nvidia,cs-setup-clk-count = <0x1e>;
					nvidia,cs-hold-clk-count = <0x1e>;
					nvidia,rx-clk-tap-delay = <0x1f>;
					nvidia,tx-clk-tap-delay = <0x00>;
				};
			};

			spi@1 {
				compatible = "microchip,mcp25xxfd";
				reg = <0x01>;
				spi-max-frequency = <0x989680>;
				nvidia,enable-hw-based-cs;
				nvidia,rx-clk-tap-delay = <0x07>;
				clocks = <0x01>;
				interrupts = <0xffffffff 0xc2 0x01>;
			};
		};
	};

	fragment@2 {
		target = <0xffffffff>;

		__overlay__ {
			pinctrl-names = "default";
			pinctrl-0 = <0x02>;

			header-40pin-pinmux {
				linux,phandle = <0x02>;
				phandle = <0x02>;

				pin19 {
					nvidia,pins = "spi1_mosi_pc0";
					nvidia,function = "spi1";
					nvidia,pull = <0x01>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x00>;
				};

				pin21 {
					nvidia,pins = "spi1_miso_pc1";
					nvidia,function = "spi1";
					nvidia,pull = <0x01>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x01>;
				};

				pin23 {
					nvidia,pins = "spi1_sck_pc2";
					nvidia,function = "spi1";
					nvidia,pull = <0x01>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x01>;
				};

				pin24 {
					nvidia,pins = "spi1_cs0_pc3";
					nvidia,function = "spi1";
					nvidia,pull = <0x02>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x00>;
				};

				pin26 {
					nvidia,pins = "spi1_cs1_pc4";
					nvidia,function = "spi1";
					nvidia,pull = <0x02>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x00>;
				};

				pin37 {
					nvidia,pins = "spi2_mosi_pb4";
					nvidia,function = "spi2";
					nvidia,pull = <0x01>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x00>;
				};

				pin22 {
					nvidia,pins = "spi2_miso_pb5";
					nvidia,function = "spi2";
					nvidia,pull = <0x01>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x01>;
				};

				pin13 {
					nvidia,pins = "spi2_sck_pb6";
					nvidia,function = "spi2";
					nvidia,pull = <0x01>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x01>;
				};

				pin18 {
					nvidia,pins = "spi2_cs0_pb7";
					nvidia,function = "spi2";
					nvidia,pull = <0x02>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x00>;
				};

				pin16 {
					nvidia,pins = "spi2_cs1_pdd0";
					nvidia,function = "spi2";
					nvidia,pull = <0x02>;
					nvidia,tristate = <0x00>;
					nvidia,enable-input = <0x00>;
				};
			};
		};
	};

	fragment@3 {
		target = <0xffffffff>;

		__overlay__ {

			spi@0 {
				compatible = "microchip,mcp25xxfd";
				reg = <0x00>;
				spi-max-frequency = <0x989680>;
				nvidia,enable-hw-based-cs;
				nvidia,rx-clk-tap-delay = <0x07>;
				clocks = <0x01>;
				interrupt-parent = <0xffffffff>;
				interrupts = <0xa8 0x01>;

				controller-data {
					nvidia,cs-setup-clk-count = <0x1e>;
					nvidia,cs-hold-clk-count = <0x1e>;
					nvidia,rx-clk-tap-delay = <0x1f>;
					nvidia,tx-clk-tap-delay = <0x00>;
				};
			};
		};
	};

	__symbols__ {
		can_clock = "/fragment@0/__overlay__/clocks/can_clock";
		hdr40_pinmux = "/fragment@2/__overlay__/header-40pin-pinmux";
	};

	__fixups__ {
		hdr40_spi1 = "/fragment@1:target:0";
        gpio = "/fragment@1/__overlay__/spi@0:interrupts:0", 
            "/fragment@1/__overlay__/spi@1:interrupts:0",
            "/fragment@3/__overlay__/spi@0:interrupt-parent:0";
		pinmux = "/fragment@2:target:0";
		hdr40_spi2 = "/fragment@3:target:0";
	};

	__local_fixups__ {

		fragment@1 {

			__overlay__ {

				spi@0 {
					clocks = <0x00>;
				};

				spi@1 {
					clocks = <0x00>;
				};
			};
		};

		fragment@2 {

			__overlay__ {
				pinctrl-0 = <0x00>;
			};
		};

		fragment@3 {

			__overlay__ {

				spi@0 {
					clocks = <0x00>;
				};
			};
		};
	};
};

Sorry, I have not tried to set one up as an interrupt.

hello jake,

here’s an example of interrupt gpio.

        gpio@20 {
                compatible = "nxp,pca9505";
                reg = <0x20>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_pca9505>;
                interrupt-parent = <&gpio3>;
                interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
        };

Thank you!