After configuring the GPIO to key input mode, a 51 kΩ pull-up resistor is required to maintain the pin at high level. Moreover, plugging/unplugging DP cables or touching the onboard DP female connector shell with an HDMI male plug triggers continuous bounce noise, causing false triggering and occasionally latching the GPIO at low level permanently.
Which signal is used as GPIO in this case? Does this happen on the NVIDIA Orin Nano Dev Kit?
Hello, the issue occurs on the Orin Nano DevKit and can be stably reproduced. This problem manifests on all GPIOs. We are currently verifying with GPIO12 and GPIO11. These pins go through a level shifter which requires a pull-up resistor of 51kΩ or higher, as the level shifter only provides microampere-scale driving capability.
Can you please provide a diagram of your test setup, including the level shifter, pull up resistor, and where on the Dev Kit carrier you access the GPIOs?
Without a 51kΩ pull-up resistor, the B-side of the level-shift IC measures low logic level even though the A-side has been pulled high via software. According to the level shifter’s datasheet, the external pull-up resistance must exceed 50kΩ. Repeatedly touching the DP housing after power-up causes signal chattering with false low-level triggering; occasionally the line latches permanently at a low logic state.