GPIO register access

[teemu1]

Hi, I’ve trying to figure out how to access Xavier NX GPIO registers from Linux. I’m aware that there is a way to use libgpiod or similiar file system based approach but it’s slow and jittery. I want to access registers directly without going to kernel coding.

What I’m looking is a way to mmap() the /dev/mem and access directly the GPIO registers like done in this example done for Nano: https://github.com/jwatte/jetson-gpio-example/blob/master/gpiomem.cpp

Unfortunately Jetson NX TRM does not give enough details to adapt this code from Nano to NX. It appears GPIO register details were omitted from the TRM? Is there an another document that would explain the GPIO registers and pin to address mapping?
TRM explains only pinmux registers that are not sufficient to control the actual GPIO pin states.

There have been questions about this before but have not been answered or are for different platform.

GPIO control on Xavier nx with register writes

Hello Jerry, If I am right then the registers which you have suggested are pinmux registers which are used to configure pin properties, But my use case is: I have allready configured the GPIO using file operations (as in Jetson GPIO) and now all I need to do is to make the GPIO output value HIGH or LOW (i-e /sys/class/gpio/gpio266/value should read 1 or 0) and I need help in locating the register or a bit which I should toggle so that the output at corresponding GPIO turns HIGH or LOW. Summa…

Jetson Nano Fast GPIO C++ Example with Direct Register Access

For your information, @valentis updated @snarky’s gpio example with more relevant addresses. https://github.com/valentis/jetson-nano-gpio-example I tried the “switch.cpp” example, and it works. Many of the addresses are mapped out. Below is an excerpt from “gpionano.h” by @valentis. Question: how can we access the other Jetson Nano header pins with this Direct Register Access method? // The only address we really need #define GPIO_216 0x6000d60C // Jetson Nano 7[AUDIO_MCLK] #defi…

[WayneWWW]

We will check the release of this part in document. The information is too much for me to directly share.

[teemu1]

@WayneWWW

We will check the release of this part in document. The information is too much for me to directly share.

Thank you for the reply. Just to clarify, do you mean that you’re planning to release this information in the future? (e.g. as TRM document update).

[WayneWWW]

Yes

[xiaoyu.wang2]

2 Make the GPIO, HIGH —need help

Found something works for me (Nvidia orin TRM v1.2p):

background:
I am trying to set gpio01(P1.05) to high and low from register, when the pin is already configured as output

• base of gpio ctrl address: GPIO_CTL 0x02200000
  

  

• register that contains the output value: GPIO_Q_OUTPUT_VALUE_05_0 Offset: 0x126b0

• sudo devmem2 0x022126b0
  gives the value stored in gpio01 output register