# GPU ↔ FPGA over PCIe: asynchronous P2P / GPUDirect RDMA

**URL:** <https://forums.developer.nvidia.com/t/gpu-fpga-over-pcie-asynchronous-p2p-gpudirect-rdma/384187>\
**Category:** GPU - Hardware\
**Tags:** performance, pcie, fpga, cuda, rdma\
**Created:** [September 24, 2026, 6:33am UTC](https://forums.developer.nvidia.com/t/gpu-fpga-over-pcie-asynchronous-p2p-gpudirect-rdma/384187 "2026-09-24T06:33:49Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![zvimarks](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@zvimarks](https://forums.developer.nvidia.com/u/zvimarks)\
**Post date:** [September 24, 2026, 6:33am UTC](https://forums.developer.nvidia.com/t/gpu-fpga-over-pcie-asynchronous-p2p-gpudirect-rdma/384187/1 "2026-09-24T06:33:49Z")

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I’m exploring a GPU + FPGA design and trying to understand what is possible with current NVIDIA hardware/software.

If an FPGA is connected to the same PCIe hierarchy as an NVIDIA GPU:

- Can the GPU submit a small request to the FPGA and continue running other CUDA kernels while the FPGA processes it?
- Can the FPGA DMA the result directly into GPU memory using GPUDirect RDMA / PCIe P2P?
- What is the recommended mechanism for synchronization/completion without blocking the GPU?

Conceptually:

GPU → small request → FPGA does work using local memory → result → GPU

while the GPU continues doing other work.

Is this a supported/practical architecture today? Any relevant NVIDIA documentation or examples would be appreciated.

Thanks  
Zvi