# Hardware-accelerated tanh() on Turing

**URL:** <https://forums.developer.nvidia.com/t/hardware-accelerated-tanh-on-turing/173291>\
**Category:** CUDA Programming and Performance\
**Created:** [March 25, 2021, 6:11am UTC](https://forums.developer.nvidia.com/t/hardware-accelerated-tanh-on-turing/173291 "2021-03-25T06:11:11Z")\
**Posts on this page:** 2\
**Page:** 1

<div class="post-metadata">

**Author:** ![njuffa](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@njuffa](https://forums.developer.nvidia.com/u/njuffa)\
**Post date:** [March 25, 2021, 6:11am UTC](https://forums.developer.nvidia.com/t/hardware-accelerated-tanh-on-turing/173291/1 "2021-03-25T06:11:11Z")

</div>

This may be old news to some, but I just discovered today that a `MUFU.TANH` instruction was added to the GPU in Turing (`sm_75`). While this is exposed in PTX as `tanh.approx.f32`, there does not seem to be a matching device function intrinsic `__tanhf()`.

The new instruction delivers results accurate to about 16.5 bits. More precisely, the maximum error over the entire input range is 133.96 ulps while the maximum relative error is 1.113e-5. As it turns out, one can construct a software equivalent for older GPU architectures with very closely matching characteristics: maximum error of 108.83 ulps and maximum relative error of 9.345e-6. I combined these into a `__tanhf()` device function below:

```auto
/*
  Copyright (c) 2021, Norbert Juffa
  All rights reserved.

  Redistribution and use in source and binary forms, with or without 
  modification, are permitted provided that the following conditions
  are met:

  1. Redistributions of source code must retain the above copyright 
     notice, this list of conditions and the following disclaimer.

  2. Redistributions in binary form must reproduce the above copyright
     notice, this list of conditions and the following disclaimer in the
     documentation and/or other materials provided with the distribution.

  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

__forceinline__  __device__ float raw_ex2 (float a)
{
    float r;
    asm ("ex2.approx.ftz.f32 %0,%1;" : "=f"(r) : "f"(a));
    return r;
}

__forceinline__  __device__ float raw_rcp (float a)
{
    float r;
    asm ("rcp.approx.ftz.f32 %0,%1;" : "=f"(r) : "f"(a));
    return r;
}

__forceinline__  __device__ float copysignf_pos (float a, float b)
{
    float r;
    r = __int_as_float (__float_as_int (a) | (__float_as_int (b) & 0x80000000));
    return r;
}

__device__ float __tanhf (float a)
{
#if ( __CUDA_ARCH__ >= 750)
    // maxulp=133.95290 maxrelerr= 1.11261083e-05
    float r;
    asm ("tanh.approx.f32 %0,%1; \n\t" : "=f"(r) : "f"(a));
#else // CUDA_ARCH
    // maxulp=108.82848 maxrelerr= 9.34501462e-06
    const float L2E = 1.442695041f;
    float e, r, s, t, d;
    s = fabsf (a);
    t = -L2E * 2.0f * s;
    e = raw_ex2 (t);
    d = e + 1.0f;
    r = raw_rcp (d);
    r = fmaf (e, -r, r);
    if (s < 4.997253418e-3f) r = a;
    if (!isnan(a)) r = copysignf_pos (r, a);
    return r;
#endif // CUDA_ARCH
    return r;
}

```

---

<div class="post-metadata">

**Author:** ![njuffa](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@njuffa](https://forums.developer.nvidia.com/u/njuffa)\
**Post date:** [April 7, 2021, 6:39pm UTC](https://forums.developer.nvidia.com/t/hardware-accelerated-tanh-on-turing/173291/2 "2021-04-07T18:39:57Z")

</div>

I finally got around to characterizing the performance more carefully. On a Quadro RTX 4000 (`sm_75`) I measured:

`__tanhf()` using `MUFU.TANH`: 440 x 109 function calls per second  
`__tanhf()` using `MUFU.EX2` and `MUFU.RCP`: 248 x 109 function calls per second  
CUDA 11.2 built-in `tanhf()`: 195 x 109 function calls per second.

The built-in `tanhf` contains a data-dependent branch. While my test framework exercised both branches, performance may deviate somewhat depending on the distribution of source arguments.
