Hardware address translation unit of Fermi Dynamic address translation.

In order to support C++, Fermi introduces new addressing model, which unified three memory space into a single memory space. The addressable memory space now is up to terabytes. In addition, Fermi’s hardware address translation unit automatically maps pointer reference (c++) to the correct memory space. My questions, does this mean that I can never know the specific and real memory location of read/write operations in programming time owing to the dynamic address translations? Would you please discuss this problem with me? thanks.

You also can’t know with previous architectures. Try allocating a buffer from several threads in different contexts. My experience is that with the first allocation you will always get the same pointer (somewhere around 0x11000 IIRC)

The difference is that there is one memory space, but there was memory protection also before

You also can’t know with previous architectures. Try allocating a buffer from several threads in different contexts. My experience is that with the first allocation you will always get the same pointer (somewhere around 0x11000 IIRC)

The difference is that there is one memory space, but there was memory protection also before