HDMI clock modulation

Is it possible to fine tune the HDMI clock (change the fractional PLL) without disruption of the output in order to achieve genlocking to an external source? Alternatively, could the one-shot mode in DC be triggered in software way or it really needs a hardware TE pin? We are runing a multi-node cluster of TX2’s whose video outputs shall be in perfect sync.

Hi danieel,

Could you describe more about the multi-node cluster? You are using a group of tx2 and each connected to several display devices?

Exactly, we have 4 TX2’s and each is processing portion of the input video signal that is split by an FPGA. The data comes through our PCIe core and V4L2 interface. We are able to provide frame/line level counters or timestamps to keep track of the input timing.

After processing, the video is outputted through HDMI and shall be merged again by an FPGA. A slight delay is acceptable, but with an enough long time, the clock may and will drift between nodes too far away. Ideal case would be to keep the outputs synchronized under 1 video line of difference.

Hi danieel,

Just checked with engineer internally,

1. Is it possible to fine tune the HDMI clock (change the fractional PLL) without disruption of the output in order to achieve genlocking to an external source?
-->No, that won't work.

2. Alternatively, could the one-shot mode in DC be triggered in software way or it really needs a hardware TE pin?
--> Still checking