HDMI Failed

Hello,I want to link with a HDMI Display but it failed.Then i get the error message by the serial.

[ 6539.647154] tegradc 15210000.nvdisplay: dp: Failed to write DPCD data. CMD 0x600, Status 0x10000100
[ 6539.661420] tegradc 15210000.nvdisplay: dp: aux write got error (0x10000100)

开机检测不到HDMI.txt (8.4 KB)

拔掉HDMI线.txt (873 Bytes)

Starting kernel …

[ 0.000000] Booting Linux on physical CPU 0x100
[ 0.000000] Linux version 4.9.299-tegra (buildbrain@mobile-u64-5494-d8000) (gcc version 7.3.1 20180425 [linaro-7.3-2018.05 revision d29120a424ecfbc167ef90065c0eeb7f91977701] (Linaro GCC 7.3-2018.05) ) #1 SMP PREEMPT Tue Nov 22 09:24:30 PST 2022
[ 0.000000] Boot CPU: AArch64 Processor [411fd073]
[ 0.000000] OF: fdt:memory scan node memory@80000000, reg size 80,
[ 0.000000] OF: fdt: - 80000000 , 70000000
[ 0.000000] OF: fdt: - f0200000 , 85600000
[ 0.000000] OF: fdt: - 175e00000 , 200000
[ 0.000000] OF: fdt: - 176600000 , 200000
[ 0.000000] OF: fdt: - 177000000 , 200000
[ 0.000000] earlycon: uart8250 at MMIO32 0x0000000003100000 (options ‘’)
[ 0.000000] bootconsole [uart8250] enabled
[ 0.000000] Found tegra_fbmem: 00800000@96085000
[ 0.000000] Found lut_mem: 00002008@96081000
[ 1.402125] imx219 9-0010: imx219_board_setup: error during i2c read probe (-121)
[ 1.409688] imx219 9-0010: board setup failed
[ 1.437634] imx219 10-0010: imx219_board_setup: error during i2c read probe (-121)
[ 1.445260] imx219 10-0010: board setup failed
[ 11.080616] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 11.086986] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 11.093602] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 11.098653] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 11.105264] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 11.110749] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 11.116493] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 11.121630] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 11.126884] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 11.518130] cgroup: cgroup2: unknown option “nsdelegate”
[ 11.887286] random: crng init done
[ 11.890693] random: 7 urandom warning(s) missed due to ratelimiting
[ 12.623081] using random self ethernet address
[ 12.649739] using random host ethernet address
[ 13.321622] using random self ethernet address
[ 13.331203] using random host ethernet address
[ 14.485307] Bridge firewalling registered
[ 21.320735] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 21.327317] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 21.334223] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 21.339343] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 21.346015] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 21.351549] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 21.357319] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 21.362481] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 21.368310] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 23.930605] tegra-i2c 3160000.i2c: no acknowledge from address 0x50
[ 23.937770] tegra-i2c c240000.i2c: no acknowledge from address 0x50
[ 23.944845] tegra-i2c 3180000.i2c: no acknowledge from address 0x50

Ubuntu 18.04.6 LTS hebin-desktop ttyS0

hebin-desktop login: [ 31.560629] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 31.567004] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 31.573647] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 31.578726] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 31.585354] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 31.590851] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 31.596631] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 31.601783] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 31.607046] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 41.800621] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 41.806990] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 41.813618] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 41.818688] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 41.825329] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 41.830836] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 41.836596] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 41.841749] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 41.847016] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 43.458145] tegra-i2c 3160000.i2c: no acknowledge from address 0x50
[ 43.464975] tegra-i2c c240000.i2c: no acknowledge from address 0x50
[ 43.471538] tegra-i2c 3180000.i2c: no acknowledge from address 0x50
[ 52.215763] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 52.222131] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 52.228794] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 52.233870] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 52.240568] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 52.246070] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 52.251826] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 52.256974] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 52.262243] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 62.520435] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 62.526802] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 62.533438] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 62.538559] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 62.545193] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 62.550691] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 62.556446] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 62.561597] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 62.566864] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 72.776831] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 72.783201] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 72.789833] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 72.794906] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 72.801526] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 72.807026] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 72.812781] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 72.817987] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 72.823439] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 83.018851] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 83.025215] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 83.031850] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 83.037156] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 83.043788] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 83.049288] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 83.055042] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 83.060187] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 83.065454] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 93.258865] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 93.265231] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 93.271866] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 93.276939] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 93.283558] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 93.289051] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 93.294805] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 93.299956] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 93.305222] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 103.498878] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 103.505248] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 103.511876] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 103.516943] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 103.523569] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 103.529061] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 103.534814] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 103.539959] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 103.545224] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 113.738867] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 113.745248] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 113.751876] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 113.756944] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 113.763568] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 113.769061] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 113.774814] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 113.779960] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 113.785221] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 113.792091] tegradc 15200000.nvdisplay: hdmi: edid read failed
[ 123.978887] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 123.978890] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 123.978894] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 123.978897] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 123.978900] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 123.978902] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 123.978905] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 123.978908] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 123.978942] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 124.041492] tegradc 15200000.nvdisplay: Invalid out_w + out_x (1920) > hActive (1280)
[ 124.041492] OR/AND out_h + out_y (1080) > vActive (720)
[ 124.041492] for WIN 0
[ 134.218892] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 134.218895] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 134.218899] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 134.218902] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 134.218905] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 134.218908] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 134.218911] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 134.218913] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 134.218947] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50
[ 144.460616] tegra-i2c 3190000.i2c: rx dma timeout txlen:28 rxlen:128
[ 144.460618] tegra-i2c 3190000.i2c: — register dump for debugging ----
[ 144.460622] tegra-i2c 3190000.i2c: I2C_CNFG - 0x22c00
[ 144.460625] tegra-i2c 3190000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 144.460628] tegra-i2c 3190000.i2c: I2C_FIFO_CONTROL - 0x1c
[ 144.460631] tegra-i2c 3190000.i2c: I2C_FIFO_STATUS - 0x800040
[ 144.460633] tegra-i2c 3190000.i2c: I2C_INT_MASK - 0x6c
[ 144.460636] tegra-i2c 3190000.i2c: I2C_INT_STATUS - 0x2
[ 144.460670] tegra-i2c 3190000.i2c: i2c transfer timed out addr: 0x50

麻煩把Linux_for_Tegra/rootfs/boot/extlinux/extlinux.conf裡面的quiet拿掉,重新燒機之後再抓log… 不然這個log其實沒什麼幫助

另外, 建議你可以把你的線路圖附上… 現在這個沒有上下文直接問說hdmi不會動其實我也不知道該回答你什麼


Please remove the “quiet” from Linux_for_Tegra/rootfs/boot/extlinux/extlinux.conf and reflash the board. This will enable full log. Otherwise, current log does not provide much info.

Also, you could attach the schematic. Current situation is lacking of background story and I am not sure what to reply …

好的,我先修改掉文件里的quiet,然后刷机,在抓log日志看一下。

以下是我的原理图;

hdmi_sch.pdf (13.8 KB)

請問有jetson 端的接線嗎?

這是什麼module? TX2-NX? TX2?


Do you have the schematic on jetson side?
What module is in use here? TX2-NX? TX2?

用的是TX2 NX

去掉quiet开机.txt (43.9 KB)
去掉quiet开机热插拔.txt (1.6 KB)

ok. 我大概講一下你碰到的問題是什麼

先簡單交待一下背景

  1. Jetson的display hardware可以支援兩種mode. HDMI與DP. 但是同一時間只能用一種. 比方說DP driver開起來之後你就沒辦法在這根pin上面使用HDMI. 除非你去改device tree 讓它改成用HDMI driver.

  2. 預設的設定是遵照我們的devkit. 如果你有看devkit線路圖或是我們的design guide文件的話, 你可以看到我們預設DP0_TX/RX 是給DP使用. DP1_TX/RX才是給HDMI使用

所以綜合1+2. 如果你從頭到尾都不知道要更改device tree. 那你的DP0 driver就還是在DP mode. 然後你現在嘗試要用DP mode去開HDMI… 所以就碰到error.

你好,第一次做个产品,我的原理图是按照这个参考设计的,我现在是不是要去修改设备树?

@WayneWWW ,不好意思,叨扰了。

Hi,

  1. 可以修改device tree. 得先去以下網頁選你在使用的l4t版本. 裡面會有source code連結
    Jetson Linux Archive | NVIDIA Developer
    TX2-NX display相關的檔案是放在 hardware/nvidia/platform/t18x/lanai/kernel-dts/tegra186-p3636-0002-p3509-0000-a01.dts
    基本上要做的事情就是要把DP0 (SOR0)/DP1 (SOR1)的設定互換.

  2. 如果不太清楚device tree或是linux kernel的話, 看要不要直接把硬體改成做在DP1. 這樣software基本就不用更動.

Hello, I want to use two HDMI output interfaces on the board, DP0 for HDMI0 use, DP1 for HDMI1 use, the current DP1 part of the HDMI output is normal, DP0 can not be used. The circuit schematic and board design are the same in both places.

Hi,

这样的情况还是修改设备树吗?官方刷机包是不是DP0默认DP接口,DP1m

我就直接回覆你刪掉的中文comment好了.

default device tree就是一個DP + HDMI. .所以你要兩個HDMI或是兩個DP 一定都得改device tree.


如图,我是直接修改sor里面的这个状态就行了吗?(让sor和sor1里面关于hdmi-display和dp-display的状态相同)


或者是修改这一部分吗?
有没有相关的教程,不是太明白,麻烦了。

我有大概寫一個說明在此

其實我們公版設計x1 HDMI +x1 DP就是為了讓你們兩種display都有一個模板可以參考…

test.dts (239.2 KB)
你好,以下是我修改的步骤和文件,麻烦帮我查看一下有没有什么问题:
1.登录已经烧录好的系统,有文件/boot/kernel_tegra186-p3636-0002-p3509-0000-a01和/boot/dtb/kernel_tegra186-p3636-0002-p3509-0000-a01两个相同的文件;

2.使用dtc指令,把以上dtb文件反编译成dts文件并修改,修改后文件见附件;

  1. 修改后在使用dtc指令编译为dtb文件,并替换以上两个地址文件;

  2. 重启系统;

5.DP0仍不能默认成HDMI1接口。

麻煩看一下上面那個post. 你們都沒有改完整…

你好,认真阅读了你发的方法,把kernel_tegra186-p3636-0001-p3509-0000-a01文件中相关sor,nvdisplay的相关内容都和sor1做了对比修改。

提醒一下… 是把那整篇都看完 不是只看一個comment.