Help with switching modes between SPI and GPIO and Activation of ST7701S MIPI-DSI

[xtianus]

Hi @WayneWWW , great news as we are making some headway so thank you.
Here is the next concern of their progress. They are asking if there are more examples that can cover the additional concerns.

For now i am already initialized the mipi-dsi interface, and seams that the kernel attached the display to the dis interface. The next step, what i am doing now, it is initialization the display and turn on the backlight
It would be great, if they send any examples of the mipi display initialization

Specifically:
I would like to see information on how to init power the display, as well as in what format to send initialization commands. In examples of that posts, for it used the commands <TEGRA_DSI_PACKET_CMD DSI_DCS_LONG_WRITE and <TEGRA_DSI_PACKET_CMD DSI_DCS_WRITE_1_PARAM. I can`t find the description of the parameters

here is documentation that I have found.

MIPI DSI display on Jetson TX2

Currently we are trying to setup a LCD display that is connected over MIPI DSI to the Jetson. The display is a 800x1280 RGB display. The controller on the display is a JD9365 LCD driver. We have setup the timing of the display according to the manufacturer settings (see snippets below). Currently the display only shows rubbish. When we look with a scope to the MIPI signals, it does seem more or less correct. Still there are a few questions. Using the dts settings below, we expect to see a…

DSI init command 0x2E replaced by 0x00!

The display settings (nvidia,dsi-init-cmd) did not reach the display properly. Certain settings were modified by the hardware. What we did see: A display that was not properly configured. To check where the problem lay, we checked the init sequence that was transferred over the MIPI DSI to the LCD. When we compared this to the data that should have been sent, we noticed some differences with the data in the packet sequence. Our packet sequence consisted of: ... <TEGRA_DSI_PACKET_CMD DSI_DC…

Device tree DSI display init commands

Hello, Can you refer to DTS source, like arch/arm/boot/dts/panel-s-wqxga-10-1.dtsi? the command should like the following: nvidia,dsi-init-cmd = /* Long Packet: <PACKETTYPE[u8] COMMANDID[u8] PAYLOADCOUNT[u16] ECC[u8] PAYLOAD[..] CHECKSUM[u16]> */ /* Short Packet: <PACKETTYPE[u8] COMMANDID[u8] DATA0[u8] DATA1[u8] ECC[u8]> */ /* For DSI packets each DT cell is interpreted as u8 not u32 */ <TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0x3 0x0 0x0 0x10 0x00 0x2A 0x0 0x0>, <TEGRA_DSI_DELAY_MS 20>,…

Jetson tx2 mipi read reg fail

HI WayneWWW, I use command #cat /sys/kernel/debug/tegra_dsi/read_panel Return result： max ret payload size:0x4 panel reg addr:0xc9 read 0 read 0 read 0 read 0 read 0 read 0 read 0 read 0 read 0 read 0 read 0 Read data[0] 0 0 0 0 Invalid read response Invalid response packet. read 0 is the result I print, every byte. According to Mipi protocol, the first byte should be 0x87, but we are 0, and the other bytes are not correct. In addition, in order to eliminate image interference, I …