Hopper thread block reconfiguration

[wonseok.choi1]

https://developer.nvidia.com/blog/nvidia-grace-hopper-superchip-architecture-in-depth/ says thread block reconfiguration can mprove fft performance. another report says it is newly introduced feature with h100. However i cant find any information about that in cuda programming guide:( Is there any references how to use this feature (API or something?)

[Curefab]

double-post?

Hopper architecture Thread block reconfiguration

See here https://hc34.hotchips.org/assets/program/conference/day1/GPU%20HPC/HC2022.NVIDIA.Choquette.vfinal01.pdf slide 21. You can keep data in shared memory for different kernels to access, e.g. first a kernel with many threads and 64 registers per kernel, then a second kernel with 256 registers per kernel. Not sure, if this is related or independent: https://docs.nvidia.com/cuda/parallel-thread-execution/#miscellaneous-instructions-setmaxnreg

[wonseok.choi1]

Thank you. Can i change the number of thread during kernel execution?? Im working on implementing fft and fusing 2 or 3 kernels with that feature needs to change execution environment like gridDim or blockDim. For example, when i compute 64k fft with 128,512 radix, i need 256 threads for 128 and 512 threads for 512 for each threadblock