How can i change jetson orin camera CPHY CSI Swizzle Register

[helianyi]

How can i change jetson orin camera CPHY CSI Swizzle Register

[helianyi]

[ShaneCCC]

I would suggest follow the sensor design guide to design your camera board to avoid to do swizzle.

[helianyi]

hi Shane CCC：
I want to support CPHY and DPHY, so follow design guide, need to do swizzle.

[helianyi]

[ShaneCCC]

Why just follow the first design.
You can reference to csi4_fops.c to implement write the REG for NX.(csi5_fops.c), but this driver only for v4l use case if you need ISP then the driver didn’t public.

Thanks

[helianyi]

HI ShaneCCC:
our soc is orin agx

[ShaneCCC]

OK Orin using the csi5_fops.c too.

[helianyi]

HI ShaneCCC
it can not acess by readl((void )0x15a11ce0); maybe can acess csi5_stream_set_config
/ Brick config */
memset(&brick_config, 0, sizeof(brick_config));
brick_config.phy_mode = (!is_cphy) ?
NVCSI_PHY_TYPE_DPHY : NVCSI_PHY_TYPE_CPHY;
brick_config.lane_polarity[0] = NVCSI_CPHY_POLARITY_BCA;

[ShaneCCC]

Looks like the camera firmware will do the polarity configure if configure to CPHY mode.
So you can just configure PHY mode by device tree.

static bool nvcsi_cil_check_lanes(
2031  	const struct nvcsi_brick_config *brick_cfg,
2032  	uint32_t const cil,
2033  	uint32_t const num_lanes)
2034  {
2035  	uint32_t max_polarity = 0U;
2036  
2037  	if (brick_cfg->lane_swizzle > NVCSI_LANE_SWIZZLE_B1A0B0A1) {
2038  		return false;
2039  	}
2040  
2041  	if (brick_cfg->phy_mode == NVCSI_PHY_TYPE_DPHY) {
2042  		max_polarity = NVCSI_DPHY_POLARITY_SWAP;
2043  	} else if (brick_cfg->phy_mode == NVCSI_PHY_TYPE_CPHY) {
2044  		max_polarity = NVCSI_CPHY_POLARITY_CBA;
2045  	} else  {
2046  		return false;
2047  	}
2048  
2049  	for (uint32_t i = 0U; i < 4U; i++) {
2050  		if (brick_cfg->lane_polarity[i] > max_polarity) {
2051  			return false;
2052  		}
2053  	}
2054  
2055  	return nvcsi_cil_are_num_lanes_supported(brick_cfg->phy_mode, cil, num_lanes);
2056  }

[helianyi]

HI ShaneCCC:
base you the code you pasted, it just set max_polarity to check lane_polarity is valid.

[ShaneCCC]

Suppose you just need to modify the phy_mode=“CPHY”; for it.

				mode0 { // OV5693_MODE_2592X1944
165 					mclk_khz = "24000";
166 					num_lanes = "2";
167 					tegra_sinterface = "serial_c";
168 					phy_mode = "DPHY";

[helianyi]

HI ShaneCCC:
I want to set some lane polarity to NVCSI_CPHY_POLARITY_BCA, how camera firmware to know which lane polarity I want to set?

[ShaneCCC]

You are right not just set the phy_mode also need set the brick_config.lane_polarity[i] for it.

static void nvcsi_set_lane_swizzle(
2902  	const uint32_t phy)
2903  {
2904  	const struct nvcsi_brick_config *brick_config = &(nvcsi.bricks[phy].brick_config);
2905  
2906  	/* Set lane swizzle config */
2907  	//coverity[cert_int30_c_violation] #See PHY_BRICK_REG_OFFSET definition.
2908  	nvcsi_writel(PHY_BRICK_REG_OFFSET(phy, NVCSI_CIL_LANE_SWIZZLE_CTRL),
2909  		PHY_NUM(CIL_LANE_SWIZZLE_CTRL, LANE_SWIZZLE_CTRL, brick_config->lane_swizzle));
2910  
2911  	/* Set lane polarity swizzle configuration */
2912  	for (uint32_t i = 0U; i < 4U; i += 2U) {
2913  		uint32_t polarity_swizzle_ctrl_reg = 0U;
2914  
2915  		if (brick_config->phy_mode == NVCSI_PHY_TYPE_CPHY) {
2916  			polarity_swizzle_ctrl_reg
2917  				= CIL_NUM(POLARITY_SWIZZLE_CTRL, POLARITY_SWIZZLE_CPHY0,
2918  					brick_config->lane_polarity[i])
2919  				| CIL_NUM(POLARITY_SWIZZLE_CTRL, POLARITY_SWIZZLE_CPHY1,
2920  					brick_config->lane_polarity[i + 1U]);
2921  		} else {
2922  			polarity_swizzle_ctrl_reg
2923  				= CIL_BOOL(POLARITY_SWIZZLE_CTRL, POLARITY_SWIZZLE_DPHY0,
2924  					brick_config->lane_polarity[i])
2925  				| CIL_BOOL(POLARITY_SWIZZLE_CTRL, POLARITY_SWIZZLE_DPHY1,
2926  					brick_config->lane_polarity[i + 1U]);
2927  		}
2928  
2929  		const uint32_t polarity_swizzle_ctrl_reg_addr
2930  			= ((i >> 1U) == NVCSI_CIL_A) ?
2931  				//coverity[cert_int30_c_violation] #See PHY_BRICK_REG_OFFSET definition.
2932  				PHY_BRICK_REG_OFFSET(phy, NVCSI_CIL_A_POLARITY_SWIZZLE_CTRL) :
2933  				//coverity[cert_int30_c_violation] #See PHY_BRICK_REG_OFFSET definition.
2934  				PHY_BRICK_REG_OFFSET(phy, NVCSI_CIL_B_POLARITY_SWIZZLE_CTRL);
2935  
2936  		nvcsi_writel(polarity_swizzle_ctrl_reg_addr, polarity_swizzle_ctrl_reg);
2937  	}
2938  }