How can I use MC DFD Interface??(CoreSight)

I’m trying to use Jetson’s CoreSight feature.
Since there’s only 32KB buffer for ETF in Parker SoC, I can’t trace program’s control flow with full trace output.
While reading the Parker’s specification pdf, I found something interesting in DFD components.
It appears that ETR which located in CoreSight SoC 400 connects to AXICIF and AXICIF connects to DFD PC.
And in ETR MC Interface section, what it says is like I can use this feature in some way.
However I could not find any materials about this feature.
So the question is, how can I use this interface and is this feature implemented in L4T kernel or something?


This was verified in r28.3
May be you can give it a try


Thanks for the link (which I was looking for but missing), bbasu!

However I still can’t figure out a way to set trace sinks as DDR via ETR DMA for my Jetson TX2 since there seems no documentation available…
Is there any material that describes ETR DMA feature as well?