How do I add the WM8904 audio driver in the jetson Device Tree?

Hello,I see that the kernel source code of Jetson supports WM8904 series audio drivers, i2c@c250000 the device tree node uses Realtek RT5658 audio driver by default, I want to replace this RT5658 with WM8904, I have seen the documentation of WM8904 .txt as follows:

WM8904 audio CODEC

This device supports I2C only.

Required properties:
  - compatible: "wlf,wm8904" or "wlf,wm8912"
  - reg: the I2C address of the device.
  - clock-names: "mclk"
  - clocks: reference to
    <Documentation/devicetree/bindings/clock/clock-bindings.txt>

Pins on the device (for linking into audio routes):

  * IN1L
  * IN1R
  * IN2L
  * IN2R
  * IN3L
  * IN3R
  * HPOUTL
  * HPOUTR
  * LINEOUTL
  * LINEOUTR
  * MICBIAS

Examples:

codec: wm8904@1a {
	compatible = "wlf,wm8904";
	reg = <0x1a>;
	clocks = <&pck0>;
	clock-names = "mclk";
};

I also found a topic on the NVIDIA forum:https://forums.developer.nvidia.com/t/wm8904-audio-driver-support-for-jetson-tx2-nx/223343,But this topic did not use the nvidia driver, and finally there is a sound by configuring the registers of the wm8904, if I want to use the nvidia jetson wm8904 driver, how do I configure the device tree? This is the device tree path and file I modified:
hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi/
tegra194-audio-p2822-0000.dtsi (10.4 KB)
,But I feel that I changed it quite right, and I want to ask how to change it? Do I need to modify other files? This is the official tutorial I saw, but I didn’t understand:https://docs.nvidia.com/jetson/archives/r35.1/DeveloperGuide/text/SD/Communications/AudioSetupAndDevelopment.html#

@JerryChang,Hello,Can you help me look at this issue? Thank you.

Hi,

You can find dts changes from the above nvidia forum topic.

To enable audio codec driver please go through below sections on how to add custom audio card:

@Sheetal.G ,Hi,I read these two tutorial links, but the content of the document is not very detailed, such as whether I want to install the wm8904.ko driver after i2c@c250000 the device tree node, using wm8904 instead of rt5658, and modifying the device tree.thank you.

@Sheetal.G ,Hello,I see the Device tree changes you posted, I refer to this link and modify the following file:
tegra194-audio-p2822-0000.dtsi (10.9 KB)

I’m also working on tegra_machine_driver.c file to modify as follows:

static int tegra_machine_wm8904_init(struct snd_soc_pcm_runtime *rtd)
{
	struct device *dev = rtd->card->dev;
	int err;
	err = snd_soc_dai_set_sysclk(rtd->codec_dai, WM8904_CLK_MCLK, 12288000,
								 SND_SOC_CLOCK_IN);
	if (err)
	{
		dev_err(dev, "failed to wm8904 sysclk !\n");
		return err;
	}
	return 0;
}
static int codec_init(struct tegra_machine *machine)
{
	struct snd_soc_dai_link *dai_links = machine->asoc->dai_links;
	unsigned int num_links = machine->asoc->num_links, i;

	if (!dai_links || !num_links)
		return -EINVAL;

	for (i = 0; i < num_links; i++)
	{
		if (!dai_links[i].name)
			continue;

		if (strstr(dai_links[i].name, "rt565x-playback") ||
			strstr(dai_links[i].name, "rt565x-codec-sysclk-bclk1"))
			dai_links[i].init = tegra_machine_rt565x_init;
		else if (strstr(dai_links[i].name, "fe-pi-audio-z-v2"))
			dai_links[i].init = tegra_machine_fepi_init;
		else if (strstr(dai_links[i].name, "respeaker-4-mic-array"))
			dai_links[i].init = tegra_machine_respeaker_init;
		else if (strstr(dai_links[i].name, "wm8904-playback"))
			dai_links[i].init = tegra_machine_wm8904_init;
	}

	return 0;
}

For Enable audio card, I don’t know how to modify it,How do you enable audio cards for this Kconfig file?
Kconfig (8.6 KB)

The wm8904 driver file is in the Jetson kernel source code path:

./kernel/kernel-5.10/sound/soc/codecs/wm8904.c
wm8904.c (65.3 KB)
wm8904.h (89.5 KB)
Do I need to install drivers or configuration,thank you.

@WayneWWW ,Hello,之前那个ksz9896的问题已经完美解决了,谢谢你之前的帮助啦,可以帮我看看这个新的问题吗?In jetson AGX Xavier the WM8904 is used instead of the RT5658 audio driver,Thank you.

The wiring of the WM8904 and RT5658 is the same.

Hi,

You can enable the codec by adding the WM8904 config into the below list available in kconfig :

config SND_SOC_TEGRA210_AUDIO
	tristate "SoC Audio support for Tegra210"
	depends on I2C
	depends on ARCH_TEGRA_210_SOC || ARCH_TEGRA_18x_SOC
	select SND_SOC_RT5659
	select SND_SOC_TAS2552
	select SND_SOC_SGTL5000
    select <wm8904 config>

I added the following to Kconfig:

config SND_SOC_TEGRA210_AUDIO
	tristate "SoC Audio support for Tegra210"
	depends on I2C
	depends on ARCH_TEGRA_210_SOC || ARCH_TEGRA_18x_SOC
	select SND_SOC_RT5659
	select SND_SOC_TAS2552
	select SND_SOC_SGTL5000
	select SND_SOC_WM8904

Is this the right modification?

Did I modify this file correctly?
tegra194-audio-p2822-0000.dtsi (10.9 KB)

@WayneWWW ,@Sheetal.G,Hello,我修改tegra194-audio-p2822-0000.dtsi文件的内容如下,我把dtb文件放到板子上,外接显示屏,通过浏览器打开网站播放视频,并没有发出声音,是我的修改不对吗?


// SPDX-License-Identifier: GPL-2.0-only
/*
 * T194 p2822-0000 audio common DTSI file.
 *
 * Copyright (c) 2017-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 *
 */

#include <audio/tegra-platforms-audio-dai-links.dtsi>
#include <audio/tegra186-audio-dai-links.dtsi>
#include <audio/tegra186-audio-graph.dtsi>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/audio/tegra194-audio.h>
#include <audio/tegra-platforms-audio-dmic3-5-switch.dtsi>

/ {

	aconnect@2a41000 {
		status = "okay";

		agic-controller@2a41000 {
			status = "okay";
		};

		adsp@2993000 {
			status = "okay";
		};
	};
	//add
	clocks {
		wm8904_mclk: wm8904_mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		// clock-frequency = <49152000>;
		clock-frequency = <12288000>;
		clock-output-names = "wm8904-mclk";
		status = "okay";
		};
	};
	i2c@c250000 {
		//add
		wm8904: wm8904@1a {
			compatible = "wlf,wm8904";
			status ="okay";
			reg = <0x1a>;
			clocks = <&wm8904_mclk>;
			clock-names = "mclk";
		};
		// rt5658: rt5659.7-001a@1a {
		// 	compatible = "realtek,rt5658";
		// 	reg = <0x1a>;

		// 	/* refer include/sound/rt5659.h for the values to be used */
		// 	realtek,jd-src = <2>; /* RT5659_JD_HDA_HEADER */
		// 	realtek,dmic1-data-pin = <0>; /* RT5659_DMIC1_NULL */
		// 	realtek,dmic2-data-pin = <0>; /* RT5659_DMIC2_NULL */

		// 	/* Codec IRQ output */
		// 	interrupt-parent = <&tegra_main_gpio>;
		// 	interrupts = <TEGRA194_MAIN_GPIO(S, 5) GPIO_ACTIVE_HIGH>;

		// 	clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
		// 	clock-names = "mclk";

		// 	#sound-dai-cells = <1>;

		// 	sound-name-prefix = "CVB-RT";

		// 	status = "okay";

		// 	port {
		// 		rt5658_ep: endpoint {
		// 			remote-endpoint = <&i2s1_dap_ep>;
		// 			mclk-fs = <256>;
		// 			link-name = "rt565x-playback";
		// 		};
		// 	};
		// };
	};

	/* Default for all I2S is long fsync width(31) */
	aconnect@2a41000 {
		ahub {
			/* I2S4 in Short frame sync for BT SCO */
			i2s@2901300 {
				bclk-ratio = <4>;
				status = "okay";
			};
		};
	};

	tegra_acsl_audio: acsl_audio {
		status = "okay";
	};

	hda@3510000 {
		status = "okay";

		nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
	};

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";
		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
			 <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		clock-names = "pll_a", "pll_a_out0", "extern1";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		nvidia-audio-card,widgets =
		    "Headphone",    "H40-SGTL Headphone",
			"Microphone",   "H40-SGTL Mic",
			"Line",         "H40-SGTL Line In",
			"Line",         "H40-SGTL Line Out",
			"Headphone",	"CVB-RT Headphone Jack",
			"Microphone",	"CVB-RT Mic Jack",
			"Speaker",	"CVB-RT Int Spk",
			"Microphone",	"CVB-RT Int Mic";
		//add
		nvidia-audio-card,routing =
		    "H40-SGTL Headphone",   "H40-SGTL HP_OUT",
			"H40-SGTL MIC_IN",      "H40-SGTL Mic",
			"H40-SGTL ADC",         "H40-SGTL Mic Bias",
			"H40-SGTL LINE_IN",     "H40-SGTL Line In",
			"H40-SGTL Line Out",    "H40-SGTL LINE_OUT",
			"x Headphone", "x HPOUTL",
    		"x Headphone", "x HPOUTR",
			"CVB-RT Headphone Jack",     "CVB-RT HPO L Playback",
			"CVB-RT Headphone Jack",     "CVB-RT HPO R Playback",
			"CVB-RT IN1P",               "CVB-RT Mic Jack",
			"CVB-RT IN2P",               "CVB-RT Mic Jack",
			"CVB-RT Int Spk",            "CVB-RT SPO Playback",
			"CVB-RT DMIC L1",            "CVB-RT Int Mic",
			"CVB-RT DMIC L2",            "CVB-RT Int Mic",
			"CVB-RT DMIC R1",            "CVB-RT Int Mic",
			"CVB-RT DMIC R2",            "CVB-RT Int Mic";

		nvidia-audio-card,mclk-fs = <256>;
	};

	tegra_sound_graph: sound_graph {
		compatible = "nvidia,tegra186-audio-graph-card";

		/*
		 * Tegra audio graph card is based on uptream generic audio
		 * graph sound card. In future there is plan to use this
		 * as default sound card.
		 */
		status = "disabled";

		dais = /* ADMAIF (FE) Ports */
		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
		       <&admaif10_port>, <&admaif11_port>, <&admaif12_port>,
		       <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>,
		       <&admaif19_port>, <&admaif20_port>,

		       /* ADSP (FE) Ports */
		       <&adsp_pcm1_port>, <&adsp_pcm2_port>,
		       <&adsp_compr1_port>, <&adsp_compr2_port>,

		       /* XBAR I/O ports */
		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,

		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
		       <&xbar_dmic3_port>, <&xbar_dmic4_port>,

		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,

		       /* XBAR HW accelerator ports */
		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,

		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,

		       <&xbar_afc1_in_port>, <&xbar_afc2_in_port>,
		       <&xbar_afc3_in_port>, <&xbar_afc4_in_port>,
		       <&xbar_afc5_in_port>, <&xbar_afc6_in_port>,

		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
		       <&xbar_asrc_in7_port>, <&xbar_arad_port>,

		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,

		       <&xbar_ope1_in_port>,

		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,

		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,

		       /* BE I/O Ports */
		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>,
		       <&i2s4_port>, <&i2s5_port>, <&i2s6_port>,

		       <&dmic1_port>, <&dmic2_port>, <&dmic3_port>,
		       <&dmic4_port>,

		       <&dspk1_port>, <&dspk2_port>,

		       /* BE HW accelerator ports */
		       <&sfc1_out_port>, <&sfc2_out_port>,
		       <&sfc3_out_port>, <&sfc4_out_port>,

		       <&mvc1_out_port>, <&mvc2_out_port>,

		       <&afc1_out_port>, <&afc2_out_port>,
		       <&afc3_out_port>, <&afc4_out_port>,
		       <&afc5_out_port>, <&afc6_out_port>,

		       <&asrc_out1_port>, <&asrc_out2_port>,
		       <&asrc_out3_port>, <&asrc_out4_port>,
		       <&asrc_out5_port>, <&asrc_out6_port>,

		       <&mixer_out1_port>, <&mixer_out2_port>,
		       <&mixer_out3_port>, <&mixer_out4_port>,
		       <&mixer_out5_port>,

		       <&ope1_out_port>,

		       <&amx1_out_port>, <&amx2_out_port>,
		       <&amx3_out_port>, <&amx4_out_port>,

		       <&adx1_out1_port>, <&adx1_out2_port>,
		       <&adx1_out3_port>, <&adx1_out4_port>,
		       <&adx2_out1_port>, <&adx2_out2_port>,
		       <&adx2_out3_port>, <&adx2_out4_port>,
		       <&adx3_out1_port>, <&adx3_out2_port>,
		       <&adx3_out3_port>, <&adx3_out4_port>,
		       <&adx4_out1_port>, <&adx4_out2_port>,
		       <&adx4_out3_port>, <&adx4_out4_port>,

		       /* ADSP related ports */
		       <&adsp_admaif1_port>, <&adsp_admaif2_port>,
		       <&adsp_admaif3_port>, <&adsp_admaif4_port>,
		       <&adsp_admaif5_port>, <&adsp_admaif6_port>,
		       <&adsp_admaif7_port>, <&adsp_admaif8_port>,
		       <&adsp_admaif9_port>, <&adsp_admaif10_port>,
		       <&adsp_admaif11_port>, <&adsp_admaif12_port>,
		       <&adsp_admaif13_port>, <&adsp_admaif14_port>,
		       <&adsp_admaif15_port>, <&adsp_admaif16_port>,
		       <&adsp_admaif17_port>, <&adsp_admaif18_port>,
		       <&adsp_admaif19_port>, <&adsp_admaif20_port>,

		       <&admaif1_codec_port>, <&admaif2_codec_port>,
		       <&admaif3_codec_port>, <&admaif4_codec_port>,
		       <&admaif5_codec_port>, <&admaif6_codec_port>,
		       <&admaif7_codec_port>, <&admaif8_codec_port>,
		       <&admaif9_codec_port>, <&admaif10_codec_port>,
		       <&admaif11_codec_port>, <&admaif12_codec_port>,
		       <&admaif13_codec_port>, <&admaif14_codec_port>,
		       <&admaif15_codec_port>, <&admaif16_codec_port>,
		       <&admaif17_codec_port>, <&admaif18_codec_port>,
		       <&admaif19_codec_port>, <&admaif20_codec_port>;

		label = "NVIDIA Jetson AGX Xavier APE";

		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		clock-names = "pll_a", "plla_out0";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		widgets = "Headphone",	"CVB-RT Headphone Jack",
			  "Microphone", "CVB-RT Mic Jack",
			  "Speaker",	"CVB-RT Int Spk",
			  "Microphone", "CVB-RT Int Mic";

		routing = "CVB-RT Headphone Jack", "CVB-RT HPO L Playback",
			  "CVB-RT Headphone Jack", "CVB-RT HPO R Playback",
			  "CVB-RT IN1P",	   "CVB-RT Mic Jack",
			  "CVB-RT IN2P",	   "CVB-RT Mic Jack",
			  "CVB-RT Int Spk",	   "CVB-RT SPO Playback",
			  "CVB-RT DMIC L1",	   "CVB-RT Int Mic",
			  "CVB-RT DMIC L2",	   "CVB-RT Int Mic",
			  "CVB-RT DMIC R1",	   "CVB-RT Int Mic",
			  "CVB-RT DMIC R2",	   "CVB-RT Int Mic";

		/*
		 * For codec2codec based DAI link design this is required.
		 * For DPCM based design, this is optional and instead
		 * it will be picked from codec port node.
		 */
		mclk-fs = <256>;
	};
};

/*
 * Default config for all I2S dai links are
 * format = "i2s", bitclock-slave, frame-slave,
 * bitclock-noninversion, frame-noninversion,
 * Any change from default needs override on
 * platform specific files.
 */

/* Override with Codec entries */
&i2s1_to_codec {
	link-name = "wm8904-playback";
	// link-name = "rt5658-playback";
	bitclock-master;
    frame-master;
	codec {
		sound-dai = <&wm8904 0>;
		prefix = "H40-SGTL";
		// prefix = "CVB-RT";
	};
	// //add
	// link-name = "wm8904-playback";
	// cpu-dai = <&tegra_i2s1>;
	// codec-dai = <&wm8904>;
	// cpu-dai-name = "I2S1";
	// codec-dai-name = "wm8904-hifi";
	// format = "i2s";
	// bitclock-slave;
	// frame-slave;
	// bitclock-noninversion;
	// frame-noninversion;
	// bit-format = "s16_le";
	// bclk_ratio = <0>;
	// srate = <48000>;
	// num-channel = <2>;
	// ignore_suspend;
	// name-prefix = "x";
	// status = "okay";
};

hdr40_snd_link_i2s: &i2s2_to_codec { };

/* Override with BT SCO entries */
&i2s4_to_codec {
	format = "dsp_a";
	bitclock-inversion;
};

/* Audio graph related bindings */
// &i2s1_dap_ep {
// 	remote-endpoint = <&rt5658_ep>;
// };

&i2s4_dap_ep {
	dai-format = "dsp_a";
	bitclock-inversion;
};

hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };

我的设备树文件tegra194-audio-p2822-0000.dtsi和tegra_machine_driver.c file是否修改正确?如果不正确,可以帮忙修正指导一下吗?更新到板子上之后,我看到这个:https://docs.nvidia.com/jetson/archives/r35.1/DeveloperGuide/text/SD/Communications/AudioSetupAndDevelopment.html#usage-guide,要这样进行配置吗?

我通过命令查看内核的打印信息发现:

➜  ~ sudo dmesg| grep "8904"
[   12.769780] rt5659 7-001a: Device with ID register 8904 is not rt5659

这是不是wm8904的驱动没有配置生效?那我该如何让它启动生效

dmesg.txt (74.5 KB)
这是完整的dmesg打印信息
·

@WayneWWW,你好,我感觉这个应该是我的设备树与wm8904.c里面的参数定义不匹配,所以设备树参数不正确,可以指正一下问题出现在那个地方吗?

  • To which I2C wm8904 is connected? According to I2C used, codec node should be added to that I2C node.

This prefix could be anything, doesn’t need to be H40-SGTL. SGTL is for sgtl codec.

  • routing and widgets properties should have wm8904 specific entries only.
1 Like

@Sheetal.G ,你好,我看到我这里确实写错了,我修改如下,

// SPDX-License-Identifier: GPL-2.0-only
/*
 * T194 p2822-0000 audio common DTSI file.
 *
 * Copyright (c) 2017-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 *
 */

#include <audio/tegra-platforms-audio-dai-links.dtsi>
#include <audio/tegra186-audio-dai-links.dtsi>
#include <audio/tegra186-audio-graph.dtsi>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/audio/tegra194-audio.h>
#include <audio/tegra-platforms-audio-dmic3-5-switch.dtsi>

/ {

	aconnect@2a41000 {
		status = "okay";

		agic-controller@2a41000 {
			status = "okay";
		};

		adsp@2993000 {
			status = "okay";
		};
	};
	//add
	clocks {
		wm8904_mclk: wm8904_mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		// clock-frequency = <49152000>;
		clock-frequency = <12288000>;
		clock-output-names = "wm8904-mclk";
		status = "okay";
		};
	};

	i2c@c250000 {
		//add
		wm8904_codec: wm8904@1a {
			compatible = "wlf,wm8904";
			status ="okay";
			reg = <0x1a>;
			clocks = <&wm8904_mclk>;
			// clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
			// clocks = <&pck0>;
			clock-names = "mclk";
		};

	};

	/* Default for all I2S is long fsync width(31) */
	aconnect@2a41000 {
		compatible = "nvidia,tegra210-aconnect";
    	status = "okay";
		ahub {
			/* I2S4 in Short frame sync for BT SCO */
			i2s@2901300 {
				bclk-ratio = <4>;
				status = "okay";
			};
		};
		
	};

	tegra_acsl_audio: acsl_audio {
		status = "okay";
	};

	hda@3510000 {
		status = "okay";

		nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
	};

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";
		nvidia,num-codec-link = <1>;
		nvidia,num-clk = <6>;
		nvidia,clk-rates = < 270950400  /* PLLA_x11025_RATE */
								11289600   /* AUD_MCLK_x11025_RATE */
								45158400   /* PLLA_OUT0_x11025_RATE */
								45158400   /* AHUB_x11025_RATE */
								245760000  /* PLLA_x8000_RATE */
								12288000   /* AUD_MCLK_x8000_RATE */
								49152000   /* PLLA_OUT0_x8000_RATE */
								49152000 >;/* AHUB_x8000_RATE */
		nvidia,xbar = <&tegra_axbar>;
		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
			 <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		clock-names = "pll_a", "pll_a_out0", "extern1";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		nvidia-audio-card,widgets =
		    "Headphone",    "Headphone Jack",
			"Microphone",   "Mic",
			"Line",         "Line In Jack",
			"Line",         "Line In Jack",
			"Microphone",	"MICBIAS";
		//add
		nvidia-audio-card,routing =
			"Headphone Jack", "HPOUTL",		
			"Headphone Jack", "HPOUTR",			
			"IN2L", "Line In Jack",			
			"IN2R", "Line In Jack",		
			"Mic", "MICBIAS",			
			"IN1L", "Mic";


		nvidia-audio-card,mclk-fs = <256>;
		nvidia,dai-link-1 {
                    link-name = "wm8904-playback";
                    cpu-dai = <&tegra_i2s1>;
                    codec-dai = <&wm8904_codec>;
                    cpu-dai-name = "I2S1";
                    codec-dai-name = "wm8904-hifi";
                    format = "i2s";
                    bitclock-slave;
                    frame-slave;
                    bitclock-noninversion;
                    frame-noninversion;
                    bit-format = "s16_le";
                    bclk_ratio = <0>;
                    srate = <48000>;
                    num-channel = <2>;
                    ignore_suspend;
                    // name-prefix = "x";
                    status = "okay";
            };
	};

	tegra_sound_graph: sound_graph {
		compatible = "nvidia,tegra186-audio-graph-card";

		/*
		 * Tegra audio graph card is based on uptream generic audio
		 * graph sound card. In future there is plan to use this
		 * as default sound card.
		 */
		status = "disabled";

		dais = /* ADMAIF (FE) Ports */
		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
		       <&admaif10_port>, <&admaif11_port>, <&admaif12_port>,
		       <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>,
		       <&admaif19_port>, <&admaif20_port>,

		       /* ADSP (FE) Ports */
		       <&adsp_pcm1_port>, <&adsp_pcm2_port>,
		       <&adsp_compr1_port>, <&adsp_compr2_port>,

		       /* XBAR I/O ports */
		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,

		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
		       <&xbar_dmic3_port>, <&xbar_dmic4_port>,

		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,

		       /* XBAR HW accelerator ports */
		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,

		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,

		       <&xbar_afc1_in_port>, <&xbar_afc2_in_port>,
		       <&xbar_afc3_in_port>, <&xbar_afc4_in_port>,
		       <&xbar_afc5_in_port>, <&xbar_afc6_in_port>,

		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
		       <&xbar_asrc_in7_port>, <&xbar_arad_port>,

		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,

		       <&xbar_ope1_in_port>,

		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,

		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,

		       /* BE I/O Ports */
		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>,
		       <&i2s4_port>, <&i2s5_port>, <&i2s6_port>,

		       <&dmic1_port>, <&dmic2_port>, <&dmic3_port>,
		       <&dmic4_port>,

		       <&dspk1_port>, <&dspk2_port>,

		       /* BE HW accelerator ports */
		       <&sfc1_out_port>, <&sfc2_out_port>,
		       <&sfc3_out_port>, <&sfc4_out_port>,

		       <&mvc1_out_port>, <&mvc2_out_port>,

		       <&afc1_out_port>, <&afc2_out_port>,
		       <&afc3_out_port>, <&afc4_out_port>,
		       <&afc5_out_port>, <&afc6_out_port>,

		       <&asrc_out1_port>, <&asrc_out2_port>,
		       <&asrc_out3_port>, <&asrc_out4_port>,
		       <&asrc_out5_port>, <&asrc_out6_port>,

		       <&mixer_out1_port>, <&mixer_out2_port>,
		       <&mixer_out3_port>, <&mixer_out4_port>,
		       <&mixer_out5_port>,

		       <&ope1_out_port>,

		       <&amx1_out_port>, <&amx2_out_port>,
		       <&amx3_out_port>, <&amx4_out_port>,

		       <&adx1_out1_port>, <&adx1_out2_port>,
		       <&adx1_out3_port>, <&adx1_out4_port>,
		       <&adx2_out1_port>, <&adx2_out2_port>,
		       <&adx2_out3_port>, <&adx2_out4_port>,
		       <&adx3_out1_port>, <&adx3_out2_port>,
		       <&adx3_out3_port>, <&adx3_out4_port>,
		       <&adx4_out1_port>, <&adx4_out2_port>,
		       <&adx4_out3_port>, <&adx4_out4_port>,

		       /* ADSP related ports */
		       <&adsp_admaif1_port>, <&adsp_admaif2_port>,
		       <&adsp_admaif3_port>, <&adsp_admaif4_port>,
		       <&adsp_admaif5_port>, <&adsp_admaif6_port>,
		       <&adsp_admaif7_port>, <&adsp_admaif8_port>,
		       <&adsp_admaif9_port>, <&adsp_admaif10_port>,
		       <&adsp_admaif11_port>, <&adsp_admaif12_port>,
		       <&adsp_admaif13_port>, <&adsp_admaif14_port>,
		       <&adsp_admaif15_port>, <&adsp_admaif16_port>,
		       <&adsp_admaif17_port>, <&adsp_admaif18_port>,
		       <&adsp_admaif19_port>, <&adsp_admaif20_port>,

		       <&admaif1_codec_port>, <&admaif2_codec_port>,
		       <&admaif3_codec_port>, <&admaif4_codec_port>,
		       <&admaif5_codec_port>, <&admaif6_codec_port>,
		       <&admaif7_codec_port>, <&admaif8_codec_port>,
		       <&admaif9_codec_port>, <&admaif10_codec_port>,
		       <&admaif11_codec_port>, <&admaif12_codec_port>,
		       <&admaif13_codec_port>, <&admaif14_codec_port>,
		       <&admaif15_codec_port>, <&admaif16_codec_port>,
		       <&admaif17_codec_port>, <&admaif18_codec_port>,
		       <&admaif19_codec_port>, <&admaif20_codec_port>;

		label = "NVIDIA Jetson AGX Xavier APE";

		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		clock-names = "pll_a", "plla_out0";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		widgets = 		    "Headphone",    "Headphone Jack",
			"Microphone",   "Mic",
			"Line",         "Line In Jack",
			"Line",         "Line In Jack",
			"Microphone",	"MICBIAS";

		routing = "Headphone Jack", "HPOUTL",		
			"Headphone Jack", "HPOUTR",			
			"IN2L", "Line In Jack",			
			"IN2R", "Line In Jack",		
			"Mic", "MICBIAS",			
			"IN1L", "Mic";

		/*
		 * For codec2codec based DAI link design this is required.
		 * For DPCM based design, this is optional and instead
		 * it will be picked from codec port node.
		 */
		mclk-fs = <256>;
	};
};

/*
 * Default config for all I2S dai links are
 * format = "i2s", bitclock-slave, frame-slave,
 * bitclock-noninversion, frame-noninversion,
 * Any change from default needs override on
 * platform specific files.
 */

/* Override with Codec entries */
&i2s1_to_codec {
	link-name = "wm8904-playback";
	// link-name = "rt5658-playback";
	bitclock-master;
    frame-master;
	codec {
		sound-dai = <&wm8904_codec 0>;
		//prefix = "H40-SGTL";
	};
};

hdr40_snd_link_i2s: &i2s2_to_codec { };

/* Override with BT SCO entries */
&i2s4_to_codec {
	format = "dsp_a";
	bitclock-inversion;
};

/* Audio graph related bindings */
// &i2s1_dap_ep {
// 	// remote-endpoint = <&rt5658_ep>;
// 	dai-format = "dsp_a";
// 	bitclock-inversion;
// };

&i2s4_dap_ep {
	dai-format = "dsp_a";
	bitclock-inversion;
};

hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };

wm8904 设备对应的地址是0x1a,i2c对应的是7,如下


➜ ~ sudo i2cdetect -y -r -a 7

[sudo] password for nvidia:
0 1 2 3 4 5 6 7 8 9 a b c d e f
00: – – – – – – – – – – – – – – – –
10: – – – – – – – – – – 1a – – – – –
20: – – – – – – – – – – – – – – – –
30: – – – – – – – – – – – – – – – –
40: – – – – – – – – – – – – – – – –
50: – – – – – – – – – – – – – – – 5f
60: – – – – – – – – – – – – – – – –
70: – – – – – – – – – – – – – – – –

 所有的i2c节点地址如下
➜  ~ sudo i2cdetect -l        

i2c-3   i2c             3190000.i2c                             I2C adapter
i2c-1   i2c             c240000.i2c                             I2C adapter
i2c-101 i2c             15210000.display                        I2C adapter
i2c-8   i2c             31e0000.i2c                             I2C adapter
i2c-6   i2c             31c0000.i2c                             I2C adapter
i2c-4   i2c             Tegra BPMP I2C adapter                  I2C adapter
i2c-2   i2c             3180000.i2c                             I2C adapter
i2c-0   i2c             3160000.i2c                             I2C adapter
i2c-102 i2c             15220000.display                        I2C adapter
i2c-7   i2c             c250000.i2c                             I2C adapter
i2c-5   i2c             31b0000.i2c                             I2C adapter

我把 wm8904 codec 增加在i2c-7 i2c c250000.i2c 这个节点地址是否错误?

Please define prefix for wm, could be something like CVB-WM and use it in widgets and routing properties, wherever applicable.

Check the DTB generated. Probably somewhere rt5659 compatible is used.

You need to define WM8904 endpoint.

@Sheetal.G ,谢谢你的指导,这是我修改后的配置:

// SPDX-License-Identifier: GPL-2.0-only
/*
 * T194 p2822-0000 audio common DTSI file.
 *
 * Copyright (c) 2017-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 *
 */

#include <audio/tegra-platforms-audio-dai-links.dtsi>
#include <audio/tegra186-audio-dai-links.dtsi>
#include <audio/tegra186-audio-graph.dtsi>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/audio/tegra194-audio.h>
#include <audio/tegra-platforms-audio-dmic3-5-switch.dtsi>

/ {

	aconnect@2a41000 {
		status = "okay";

		agic-controller@2a41000 {
			status = "okay";
		};

		adsp@2993000 {
			status = "okay";
		};
	};
	//add
	clocks {
		wm8904_mclk: wm8904_mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		// clock-frequency = <49152000>;
		clock-frequency = <12288000>;
		clock-output-names = "wm8904-mclk";
		status = "okay";
		};
	};

	i2c@c250000 {
		//add
		wm8904_codec: wm8904@1a {
			compatible = "wlf,wm8904";
			status ="okay";
			reg = <0x1a>;
			clocks = <&wm8904_mclk>;
			// clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
			// clocks = <&pck0>;
			clock-names = "mclk";

			port {
				wm8904_ep: endpoint {
					remote-endpoint = <&i2s1_dap_ep>;
					mclk-fs = <256>;
					link-name = "wm8904-playback";
				};
			};
		};

	};

	/* Default for all I2S is long fsync width(31) */
	aconnect@2a41000 {
		compatible = "nvidia,tegra210-aconnect";
    	status = "okay";
		ahub {
			/* I2S4 in Short frame sync for BT SCO */
			i2s@2901300 {
				bclk-ratio = <4>;
				status = "okay";
			};
		};

	};

	tegra_acsl_audio: acsl_audio {
		status = "okay";
	};

	hda@3510000 {
		status = "okay";

		nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
	};

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";
		nvidia,num-codec-link = <1>;
		nvidia,num-clk = <6>;
		nvidia,clk-rates = < 270950400  /* PLLA_x11025_RATE */
								11289600   /* AUD_MCLK_x11025_RATE */
								45158400   /* PLLA_OUT0_x11025_RATE */
								45158400   /* AHUB_x11025_RATE */
								245760000  /* PLLA_x8000_RATE */
								12288000   /* AUD_MCLK_x8000_RATE */
								49152000   /* PLLA_OUT0_x8000_RATE */
								49152000 >;/* AHUB_x8000_RATE */
		nvidia,xbar = <&tegra_axbar>;
		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
			 <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		clock-names = "pll_a", "pll_a_out0", "extern1";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		nvidia-audio-card,widgets =
		    "Headphone",    "WM Headphone Jack",
			"Microphone",   "WM Mic",
			"Line",         "WM Line In Jack",
			"Line",         "WM Line In Jack",
			"Microphone",	"WM MICBIAS";
		//add
		nvidia-audio-card,routing =
			"WM Headphone Jack", "WM HPOUTL",		
			"WM Headphone Jack", "WM HPOUTR",			
			"WM IN2L", "WM Line In Jack",			
			"WM IN2R", "WM Line In Jack",		
			"WM Mic", "WM MICBIAS",			
			"WM IN1L", "WM Mic";
			// "x Headphone", "x HPOUTL",
    		// "x Headphone", "x HPOUTR";


		nvidia-audio-card,mclk-fs = <256>;
		nvidia,dai-link-1 {
                    link-name = "wm8904-playback";
                    cpu-dai = <&tegra_i2s1>;
                    codec-dai = <&wm8904_codec>;
                    cpu-dai-name = "I2S1";
                    codec-dai-name = "wm8904-hifi";
                    format = "i2s";
                    bitclock-slave;
                    frame-slave;
                    bitclock-noninversion;
                    frame-noninversion;
                    bit-format = "s16_le";
                    bclk_ratio = <0>;
                    srate = <48000>;
                    num-channel = <2>;
                    ignore_suspend;
                    name-prefix = "WM";
                    status = "okay";
            };
	};

	tegra_sound_graph: sound_graph {
		compatible = "nvidia,tegra186-audio-graph-card";

		/*
		 * Tegra audio graph card is based on uptream generic audio
		 * graph sound card. In future there is plan to use this
		 * as default sound card.
		 */
		status = "disabled";

		dais = /* ADMAIF (FE) Ports */
		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
		       <&admaif10_port>, <&admaif11_port>, <&admaif12_port>,
		       <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>,
		       <&admaif19_port>, <&admaif20_port>,

		       /* ADSP (FE) Ports */
		       <&adsp_pcm1_port>, <&adsp_pcm2_port>,
		       <&adsp_compr1_port>, <&adsp_compr2_port>,

		       /* XBAR I/O ports */
		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,

		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
		       <&xbar_dmic3_port>, <&xbar_dmic4_port>,

		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,

		       /* XBAR HW accelerator ports */
		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,

		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,

		       <&xbar_afc1_in_port>, <&xbar_afc2_in_port>,
		       <&xbar_afc3_in_port>, <&xbar_afc4_in_port>,
		       <&xbar_afc5_in_port>, <&xbar_afc6_in_port>,

		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
		       <&xbar_asrc_in7_port>, <&xbar_arad_port>,

		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,

		       <&xbar_ope1_in_port>,

		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,

		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,

		       /* BE I/O Ports */
		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>,
		       <&i2s4_port>, <&i2s5_port>, <&i2s6_port>,

		       <&dmic1_port>, <&dmic2_port>, <&dmic3_port>,
		       <&dmic4_port>,

		       <&dspk1_port>, <&dspk2_port>,

		       /* BE HW accelerator ports */
		       <&sfc1_out_port>, <&sfc2_out_port>,
		       <&sfc3_out_port>, <&sfc4_out_port>,

		       <&mvc1_out_port>, <&mvc2_out_port>,

		       <&afc1_out_port>, <&afc2_out_port>,
		       <&afc3_out_port>, <&afc4_out_port>,
		       <&afc5_out_port>, <&afc6_out_port>,

		       <&asrc_out1_port>, <&asrc_out2_port>,
		       <&asrc_out3_port>, <&asrc_out4_port>,
		       <&asrc_out5_port>, <&asrc_out6_port>,

		       <&mixer_out1_port>, <&mixer_out2_port>,
		       <&mixer_out3_port>, <&mixer_out4_port>,
		       <&mixer_out5_port>,

		       <&ope1_out_port>,

		       <&amx1_out_port>, <&amx2_out_port>,
		       <&amx3_out_port>, <&amx4_out_port>,

		       <&adx1_out1_port>, <&adx1_out2_port>,
		       <&adx1_out3_port>, <&adx1_out4_port>,
		       <&adx2_out1_port>, <&adx2_out2_port>,
		       <&adx2_out3_port>, <&adx2_out4_port>,
		       <&adx3_out1_port>, <&adx3_out2_port>,
		       <&adx3_out3_port>, <&adx3_out4_port>,
		       <&adx4_out1_port>, <&adx4_out2_port>,
		       <&adx4_out3_port>, <&adx4_out4_port>,

		       /* ADSP related ports */
		       <&adsp_admaif1_port>, <&adsp_admaif2_port>,
		       <&adsp_admaif3_port>, <&adsp_admaif4_port>,
		       <&adsp_admaif5_port>, <&adsp_admaif6_port>,
		       <&adsp_admaif7_port>, <&adsp_admaif8_port>,
		       <&adsp_admaif9_port>, <&adsp_admaif10_port>,
		       <&adsp_admaif11_port>, <&adsp_admaif12_port>,
		       <&adsp_admaif13_port>, <&adsp_admaif14_port>,
		       <&adsp_admaif15_port>, <&adsp_admaif16_port>,
		       <&adsp_admaif17_port>, <&adsp_admaif18_port>,
		       <&adsp_admaif19_port>, <&adsp_admaif20_port>,

		       <&admaif1_codec_port>, <&admaif2_codec_port>,
		       <&admaif3_codec_port>, <&admaif4_codec_port>,
		       <&admaif5_codec_port>, <&admaif6_codec_port>,
		       <&admaif7_codec_port>, <&admaif8_codec_port>,
		       <&admaif9_codec_port>, <&admaif10_codec_port>,
		       <&admaif11_codec_port>, <&admaif12_codec_port>,
		       <&admaif13_codec_port>, <&admaif14_codec_port>,
		       <&admaif15_codec_port>, <&admaif16_codec_port>,
		       <&admaif17_codec_port>, <&admaif18_codec_port>,
		       <&admaif19_codec_port>, <&admaif20_codec_port>;

		label = "NVIDIA Jetson AGX Xavier APE";

		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		clock-names = "pll_a", "plla_out0";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		widgets = 		    "Headphone",    "WM Headphone Jack",
			"Microphone",   "WM Mic",
			"Line",         "WM Line In Jack",
			"Line",         "WM Line In Jack",
			"Microphone",	"WM MICBIAS";

		routing =			"WM Headphone Jack", "WM HPOUTL",		
			"WM Headphone Jack", "WM HPOUTR",			
			"WM IN2L", "WM Line In Jack",			
			"WM IN2R", "WM Line In Jack",		
			"WM Mic", "WM MICBIAS",			
			"WM IN1L", "WM Mic";

		/*
		 * For codec2codec based DAI link design this is required.
		 * For DPCM based design, this is optional and instead
		 * it will be picked from codec port node.
		 */
		mclk-fs = <256>;
	};
};

/*
 * Default config for all I2S dai links are
 * format = "i2s", bitclock-slave, frame-slave,
 * bitclock-noninversion, frame-noninversion,
 * Any change from default needs override on
 * platform specific files.
 */

/* Override with Codec entries */
&i2s1_to_codec {
	link-name = "wm8904-playback";
	// link-name = "rt5658-playback";
	bitclock-master;
    frame-master;
	codec {
		sound-dai = <&wm8904_codec 0>;
		prefix = "WM";
	};
};

hdr40_snd_link_i2s: &i2s2_to_codec { };

/* Override with BT SCO entries */
&i2s4_to_codec {
	format = "dsp_a";
	bitclock-inversion;
};

/* Audio graph related bindings */
&i2s1_dap_ep {
	remote-endpoint = <&wm8904_ep>;
};

&i2s4_dap_ep {
	dai-format = "dsp_a";
	bitclock-inversion;
};

hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };

我检查了一下总的dts文件,发现其他i2c节点是有rt5659,但是我不知道有没有影响?还有wm8904的驱动是否要安装?我看到jetson 内核源码是有wm8904的驱动代码,这是总的dts文件。
tegra194-p2888-0001-p2822-0000.dts (460.2 KB)