How do I add the WM8904 audio driver in the jetson Device Tree?

I configured the wm8904 codec, compiled wm8904 into the kernel, and replaced the files in the corresponding directory of jetson with Image and tegra194-p2888-0001-p2822-0000.dtb, but the check found that the log is as follows:
Reference testing guidance:: https://docs.nvidia.com/jetson/archives/r35.1/DeveloperGuide/text/SD/Communications/AudioSetupAndDevelopment.html#usage-and-examples

sudo cat /sys/bus/i2c/devices/7-001a/uevent
[sudo] password for nvidia: 
OF_NAME=rt5659.7-001a
OF_FULLNAME=/i2c@c250000/rt5659.7-001a@1a
OF_COMPATIBLE_0=realtek,rt5658
OF_COMPATIBLE_N=1
MODALIAS=of:Nrt5659.7-001aT(null)Crealtek,rt5658

There is only one sound card, no APE sound card found

➜  ~ cat /proc/asound/cards
 0 [HDA            ]: tegra-hda - NVIDIA Jetson AGX Xavier HDA
                      NVIDIA Jetson AGX Xavier HDA at 0x3518000 irq 53
sudo dmesg | grep 8904
[   12.704063] rt5659 7-001a: Device with ID register 8904 is not rt5659
[   96.169575] Error: Driver 'wm8904' is already registered, aborting...
// SPDX-License-Identifier: GPL-2.0-only
/*
 * T194 p2822-0000 audio common DTSI file.
 *
 * Copyright (c) 2017-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 *
 */

#include <audio/tegra-platforms-audio-dai-links.dtsi>
#include <audio/tegra186-audio-dai-links.dtsi>
#include <audio/tegra186-audio-graph.dtsi>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/audio/tegra194-audio.h>
#include <audio/tegra-platforms-audio-dmic3-5-switch.dtsi>

/ {

	aconnect@2a41000 {
		status = "okay";

		agic-controller@2a41000 {
			status = "okay";
		};

		adsp@2993000 {
			status = "okay";
		};
	};
	// //add
	// clocks {
	// 	wm8904_mclk: wm8904_mclk {
	// 	compatible = "fixed-clock";
	// 	#clock-cells = <0>;
	// 	// clock-frequency = <49152000>;
	// 	clock-frequency = <12288000>;
	// 	clock-output-names = "wm8904-mclk";
	// 	status = "okay";
	// 	};
	// };

	i2c@c250000 {
		add
		wm8904_codec: wm8904@1a {
			compatible = "wlf,wm8904";
			status ="okay";
			reg = <0x1a>;
			// clocks = <&wm8904_mclk>;
			// clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
			clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
			// clocks = <&pck0>;
			clock-names = "mclk";

			port {
				wm8904_ep: endpoint {
					remote-endpoint = <&i2s1_dap_ep>;
					mclk-fs = <256>;
					link-name = "wm8904-playback";
				};
			};
		};

	// 	wm8904_codec: wm8904.7-001a@1a {
	// 		compatible = "wlf,wm8904";
	// 		reg = <0x1a>;

	// 		/* refer include/sound/rt5659.h for the values to be used */
	// 		realtek,jd-src = <2>; /* RT5659_JD_HDA_HEADER */
	// 		realtek,dmic1-data-pin = <0>; /* RT5659_DMIC1_NULL */
	// 		realtek,dmic2-data-pin = <0>; /* RT5659_DMIC2_NULL */

	// 		/* Codec IRQ output */
	// 		interrupt-parent = <&tegra_main_gpio>;
	// 		interrupts = <TEGRA194_MAIN_GPIO(S, 5) GPIO_ACTIVE_HIGH>;

	// 		clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
	// 		clock-names = "mclk";

	// 		#sound-dai-cells = <1>;

	// 		sound-name-prefix = "WM";

	// 		status = "okay";

	// 		port {
	// 			rt5658_ep: endpoint {
	// 				remote-endpoint = <&i2s1_dap_ep>;
	// 				mclk-fs = <256>;
	// 				link-name = "wm8904-playback";
	// 			};
	// 		};
	// 	};
	// };

	/* Default for all I2S is long fsync width(31) */
	aconnect@2a41000 {
		compatible = "nvidia,tegra210-aconnect";
    	status = "okay";
		ahub {
			/* I2S4 in Short frame sync for BT SCO */
			i2s@2901300 {
				bclk-ratio = <4>;
				status = "okay";
			};
		};
		// tegra_axbar: ahub {
		// 	compatible = "nvidia,tegra186-ahub";
		// 	status = "okay";
			
		// 	tegra_i2s1: i2s@2901000 {
		// 		compatible = "nvidia,tegra210-i2s";
		// 		reg = <0x0 0x2901000 0x0 0x100>;
		// 		clocks = <&bpmp_clks TEGRA194_CLK_I2S1>,
		// 			<&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
		// 			<&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>,
		// 			<&bpmp_clks TEGRA194_CLK_SYNC_I2S1>,
		// 			<&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>;
		// 		clock-names = "i2s","pll_a_out0", "ext_audio_sync","audio_sync", "clk_sync_input";
		// 		assigned-clocks = <&bpmp_clks TEGRA194_CLK_I2S1>;
		// 		assigned-clock-parents =
		// 			<&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		// 		assigned-clock-rates = <1536000>;
		// 		fsync-width = <31>;
		// 		#sound-dai-cells = <1>;
		// 		sound-name-prefix = "I2S1";
		// 		status = "okay";
		// 	};
		// 	tegra_dmic1: dmic@2904000 {
        //     compatible = "nvidia,tegra210-dmic";
        //     reg = <0x0 0x2904000 0x0 0x100>;
        //     clocks = <&bpmp_clks TEGRA194_CLK_DMIC1>,
        //              <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
        //     clock-names = "dmic", "pll_a_out0";
        //     assigned-clocks = <&tegra_car TEGRA194_CLK_DMIC1>;
        //     assigned-clock-parents =
        //                 <&tegra_car TEGRA194_CLK_PLLA_OUT0>;
        //     assigned-clock-rates = <3072000>;
        //     #sound-dai-cells = <1>;
        //     sound-name-prefix = "DMIC1";
        //     status = "okay";
        // };
		// tegra_dspk1: dspk@2905000 {
        //     compatible = "nvidia,tegra186-dspk";
        //     reg = <0x0 0x2905000 0x0 0x100>;
        //     clocks = <&bpmp_clks TEGRA194_CLK_DSPK1>,
        //             <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
        //             <&bpmp_clks TEGRA194_CLK_SYNC_DSPK1>;
        //     clock-names = "dspk", "pll_a_out0", "sync_dspk";
        //     assigned-clocks = <&tegra_car TEGRA194_CLK_DSPK1>;
        //     assigned-clock-parents =
        //             <&tegra_car TEGRA194_CLK_PLLA_OUT0>;
        //     assigned-clock-rates = <3072000>;
        //     #sound-dai-cells = <1>;
        //     sound-name-prefix = "DSPK1";
        //     status = "okay";
        // };
			
		// };
	};

	tegra_acsl_audio: acsl_audio {
		status = "okay";
	};

	hda@3510000 {
		status = "okay";

		nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
	};

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";
		nvidia,num-codec-link = <1>;
		nvidia,num-clk = <6>;
		nvidia,clk-rates = < 270950400  /* PLLA_x11025_RATE */
								11289600   /* AUD_MCLK_x11025_RATE */
								45158400   /* PLLA_OUT0_x11025_RATE */
								45158400   /* AHUB_x11025_RATE */
								245760000  /* PLLA_x8000_RATE */
								12288000   /* AUD_MCLK_x8000_RATE */
								49152000   /* PLLA_OUT0_x8000_RATE */
								49152000 >;/* AHUB_x8000_RATE */
		nvidia,xbar = <&tegra_axbar>;
		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
			 <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		clock-names = "pll_a", "pll_a_out0", "extern1";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		nvidia-audio-card,widgets =
		    "Headphone",    "WM Headphone Jack",
			"Microphone",   "WM Mic",
			"Line",         "WM Line In Jack",
			"Line",         "WM Line In Jack",
			"Microphone",	"WM MICBIAS";
		//add
		nvidia-audio-card,routing =
			"WM Headphone Jack", "WM HPOUTL",		
			"WM Headphone Jack", "WM HPOUTR",			
			"WM IN2L", "WM Line In Jack",			
			"WM IN2R", "WM Line In Jack",		
			"WM Mic", "WM MICBIAS",			
			"WM IN1L", "WM Mic",
			"WM Headphone", "WM HPOUTL",
    		"WM Headphone", "WM HPOUTR";


		nvidia-audio-card,mclk-fs = <256>;

	};
		nvidia,dai-link-1 {
                    link-name = "wm8904-playback";
                    cpu-dai = <&tegra_i2s1>;
                    codec-dai = <&wm8904_codec>;
                    cpu-dai-name = "I2S1";
                    codec-dai-name = "wm8904-hifi";
                    format = "i2s";
                    bitclock-slave;
                    frame-slave;
                    bitclock-noninversion;
                    frame-noninversion;
                    bit-format = "s16_le";
                    bclk_ratio = <0>;
                    srate = <48000>;
                    num-channel = <2>;
                    ignore_suspend;
                    name-prefix = "WM";
                    status = "okay";
            };
	tegra_sound_graph: sound_graph {
		compatible = "nvidia,tegra186-audio-graph-card";

		/*
		 * Tegra audio graph card is based on uptream generic audio
		 * graph sound card. In future there is plan to use this
		 * as default sound card.
		 */
		status = "disabled";

		dais = /* ADMAIF (FE) Ports */
		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
		       <&admaif10_port>, <&admaif11_port>, <&admaif12_port>,
		       <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>,
		       <&admaif19_port>, <&admaif20_port>,

		       /* ADSP (FE) Ports */
		       <&adsp_pcm1_port>, <&adsp_pcm2_port>,
		       <&adsp_compr1_port>, <&adsp_compr2_port>,

		       /* XBAR I/O ports */
		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,

		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
		       <&xbar_dmic3_port>, <&xbar_dmic4_port>,

		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,

		       /* XBAR HW accelerator ports */
		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,

		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,

		       <&xbar_afc1_in_port>, <&xbar_afc2_in_port>,
		       <&xbar_afc3_in_port>, <&xbar_afc4_in_port>,
		       <&xbar_afc5_in_port>, <&xbar_afc6_in_port>,

		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
		       <&xbar_asrc_in7_port>, <&xbar_arad_port>,

		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,

		       <&xbar_ope1_in_port>,

		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,

		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,

		       /* BE I/O Ports */
		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>,
		       <&i2s4_port>, <&i2s5_port>, <&i2s6_port>,

		       <&dmic1_port>, <&dmic2_port>, <&dmic3_port>,
		       <&dmic4_port>,

		       <&dspk1_port>, <&dspk2_port>,

		       /* BE HW accelerator ports */
		       <&sfc1_out_port>, <&sfc2_out_port>,
		       <&sfc3_out_port>, <&sfc4_out_port>,

		       <&mvc1_out_port>, <&mvc2_out_port>,

		       <&afc1_out_port>, <&afc2_out_port>,
		       <&afc3_out_port>, <&afc4_out_port>,
		       <&afc5_out_port>, <&afc6_out_port>,

		       <&asrc_out1_port>, <&asrc_out2_port>,
		       <&asrc_out3_port>, <&asrc_out4_port>,
		       <&asrc_out5_port>, <&asrc_out6_port>,

		       <&mixer_out1_port>, <&mixer_out2_port>,
		       <&mixer_out3_port>, <&mixer_out4_port>,
		       <&mixer_out5_port>,

		       <&ope1_out_port>,

		       <&amx1_out_port>, <&amx2_out_port>,
		       <&amx3_out_port>, <&amx4_out_port>,

		       <&adx1_out1_port>, <&adx1_out2_port>,
		       <&adx1_out3_port>, <&adx1_out4_port>,
		       <&adx2_out1_port>, <&adx2_out2_port>,
		       <&adx2_out3_port>, <&adx2_out4_port>,
		       <&adx3_out1_port>, <&adx3_out2_port>,
		       <&adx3_out3_port>, <&adx3_out4_port>,
		       <&adx4_out1_port>, <&adx4_out2_port>,
		       <&adx4_out3_port>, <&adx4_out4_port>,

		       /* ADSP related ports */
		       <&adsp_admaif1_port>, <&adsp_admaif2_port>,
		       <&adsp_admaif3_port>, <&adsp_admaif4_port>,
		       <&adsp_admaif5_port>, <&adsp_admaif6_port>,
		       <&adsp_admaif7_port>, <&adsp_admaif8_port>,
		       <&adsp_admaif9_port>, <&adsp_admaif10_port>,
		       <&adsp_admaif11_port>, <&adsp_admaif12_port>,
		       <&adsp_admaif13_port>, <&adsp_admaif14_port>,
		       <&adsp_admaif15_port>, <&adsp_admaif16_port>,
		       <&adsp_admaif17_port>, <&adsp_admaif18_port>,
		       <&adsp_admaif19_port>, <&adsp_admaif20_port>,

		       <&admaif1_codec_port>, <&admaif2_codec_port>,
		       <&admaif3_codec_port>, <&admaif4_codec_port>,
		       <&admaif5_codec_port>, <&admaif6_codec_port>,
		       <&admaif7_codec_port>, <&admaif8_codec_port>,
		       <&admaif9_codec_port>, <&admaif10_codec_port>,
		       <&admaif11_codec_port>, <&admaif12_codec_port>,
		       <&admaif13_codec_port>, <&admaif14_codec_port>,
		       <&admaif15_codec_port>, <&admaif16_codec_port>,
		       <&admaif17_codec_port>, <&admaif18_codec_port>,
		       <&admaif19_codec_port>, <&admaif20_codec_port>;

		label = "NVIDIA Jetson AGX Xavier APE";

		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		clock-names = "pll_a", "plla_out0";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		widgets = 		    "Headphone",    "WM Headphone Jack",
			"Microphone",   "WM Mic",
			"Line",         "WM Line In Jack",
			"Line",         "WM Line In Jack",
			"Microphone",	"WM MICBIAS";

		routing =			"WM Headphone Jack", "WM HPOUTL",		
			"WM Headphone Jack", "WM HPOUTR",			
			"WM IN2L", "WM Line In Jack",			
			"WM IN2R", "WM Line In Jack",		
			"WM Mic", "WM MICBIAS",			
			"WM IN1L", "WM Mic";

		/*
		 * For codec2codec based DAI link design this is required.
		 * For DPCM based design, this is optional and instead
		 * it will be picked from codec port node.
		 */
		mclk-fs = <256>;
	};
};

/*
 * Default config for all I2S dai links are
 * format = "i2s", bitclock-slave, frame-slave,
 * bitclock-noninversion, frame-noninversion,
 * Any change from default needs override on
 * platform specific files.
 */

/* Override with Codec entries */
&i2s1_to_codec {
	link-name = "wm8904-playback";
	// link-name = "rt5658-playback";
	bitclock-master;
    frame-master;
	codec {
		sound-dai = <&wm8904_codec 0>;
		prefix = "WM";
	};
};

hdr40_snd_link_i2s: &i2s2_to_codec { };

/* Override with BT SCO entries */
&i2s4_to_codec {
	format = "dsp_a";
	bitclock-inversion;
};

/* Audio graph related bindings */
&i2s1_dap_ep {
	remote-endpoint = <&wm8904_ep>;
};

&i2s4_dap_ep {
	dai-format = "dsp_a";
	bitclock-inversion;
};

hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";

I have configured APE here, but it is not generated in jetson, what is the reason?

Please share this file and dmesg logs

thank you,this is tegra194-p2888-0001-p2822-0000.dtb
tegra194-p2888-0001-p2822-0000.dts (460.5 KB)
dmesg log about WM8904

➜  ~ sudo dmesg | grep 8904
[sudo] password for nvidia: 
[    7.755546] wm8904 7-001a: wm8904 codec begin check
[    7.756183] wm8904 7-001a: supply DCVDD not found, using dummy regulator
[    7.756655] wm8904 7-001a: supply DBVDD not found, using dummy regulator
[    7.756984] wm8904 7-001a: supply AVDD not found, using dummy regulator
[    7.757250] wm8904 7-001a: supply CPVDD not found, using dummy regulator
[    7.757529] wm8904 7-001a: supply MICVDD not found, using dummy regulator
[    7.764560] wm8904 7-001a: revision A

this is dmesg file
dmesg.txt (81.9 KB)

➜ ~ cat /proc/asound/cards
0 [HDA ]: tegra-hda - NVIDIA Jetson AGX Xavier HDA
NVIDIA Jetson AGX Xavier HDA at 0x3518000 irq 53
➜ ~

  • Why is the above node added? It is not required.
  • Is the codec registered? Please give the output of
    # sudo cat /sys/kernel/debug/asoc/components #sudo cat /sys/bus/i2c/devices/7-001a/uevent
1 Like

Dear Sheetal.G,ok, Here is my modification of the tegra194-audio-p2822-0000.dtsi file,
tegra194-audio-p2822-0000.dtsi (11.2 KB)

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";

I have configured APE here, but it is not generated in jetson, what is the reason?

➜  ~ sudo cat /sys/bus/i2c/devices/7-001a/uevent
DRIVER=wm8904
OF_NAME=wm8904
OF_FULLNAME=/i2c@c250000/wm8904@1a
OF_COMPATIBLE_0=wlf,wm8904
OF_COMPATIBLE_N=1
MODALIAS=of:Nwm8904T(null)Cwlf,wm8904
➜  ~

sudo cat /sys/kernel/debug/asoc/components
asoc_components_test.txt (879 Bytes)

Another is about the kernel compilation operation, to see if my operation has an error, I originally wanted to select the wm8904 driver by making ARCH=arm64 menuconfig, compile wm8904 to the kernel, but run ./nvbuild.sh -o $PWD/kernel_out to find the error
The source tree is not clean, please run 'make ARCH=arm64 mrproper'
Then I modified the kconfig configuration

config SND_SOC_WM8904
	bool "Wolfson Microelectronics WM8904 CODEC"
	default y
	depends on I2C

run cat /proc/asound/cards, No tegra-hda NVIDIA Jetson AGX Xavier APE was found

 0 [HDA            ]: tegra-hda - NVIDIA Jetson AGX Xavier HDA
                      NVIDIA Jetson AGX Xavier HDA at 0x3518000 irq 53
➜  ~

Do I need to add select SND_SOC_WM8904 to this config SND_SOC_TEGRA210_AUDIO configuration?

config SND_SOC_TEGRA210_AUDIO
	tristate "SoC Audio support for Tegra210"
	depends on I2C
	depends on ARCH_TEGRA_210_SOC || ARCH_TEGRA_18x_SOC
	select SND_SOC_RT5659
	select SND_SOC_TAS2552
	select SND_SOC_SGTL5000
	select SND_SOC_WM8904
	help
	  Say Y or M here if you want to enable support for ASoC machine driver
	  on Tegra210 and successor platforms like Tegra186, Tegra194.

I feel that these are the places I didn’t understand, or the operation was wrong.Thank you

Please check if adding below properties helps:

			#sound-dai-cells = <1>;
			sound-name-prefix = "WM";

Please confirm which JP release you are using?

Okay, I’ll compile to jetson right away and see the result.

➜ ~ sudo dmesg | grep 8904
[sudo] password for nvidia:
[ 7.454718] wm8904 7-001a: wm8904 codec begin check
[ 7.455311] wm8904 7-001a: supply DCVDD not found, using dummy regulator
[ 7.455750] wm8904 7-001a: supply DBVDD not found, using dummy regulator
[ 7.456117] wm8904 7-001a: supply AVDD not found, using dummy regulator
[ 7.456424] wm8904 7-001a: supply CPVDD not found, using dummy regulator
[ 7.456766] wm8904 7-001a: supply MICVDD not found, using dummy regulator
[ 7.461526] wm8904 7-001a: revision A
[ 13.293593] OF: /sound/nvidia-audio-card,dai-link@76/codec: could not get #sound-dai-cells for /i2c@c250000/wm8904@1a

Probably sound-dai-cells is not present for WM8904 as there is only one dai.
Please try removing the index from sound-dai for wm codec from below dts change alongwith sound-prefix-name mentioned above.
Replace with sound-dai = <&wm8904_codec>;

Ok, thank you very much, here is my complete configuration.

// SPDX-License-Identifier: GPL-2.0-only
/*
 * T194 p2822-0000 audio common DTSI file.
 *
 * Copyright (c) 2017-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 *
 */

#include <audio/tegra-platforms-audio-dai-links.dtsi>
#include <audio/tegra186-audio-dai-links.dtsi>
#include <audio/tegra186-audio-graph.dtsi>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/audio/tegra194-audio.h>
#include <audio/tegra-platforms-audio-dmic3-5-switch.dtsi>
/ {

	aconnect@2a41000 {
		status = "okay";

		agic-controller@2a41000 {
			status = "okay";
		};

		adsp@2993000 {
			status = "okay";
		};
	};
	// //add
	// clocks {
	// 	wm8904_mclk: wm8904_mclk {
	// 	compatible = "fixed-clock";
	// 	#clock-cells = <0>;
	// 	// clock-frequency = <49152000>;
	// 	clock-frequency = <12288000>;
	// 	clock-output-names = "wm8904-mclk";
	// 	status = "okay";
	// 	};
	// };
	// fixed-regulators {
	// 	wm8904-audio:regulator@66{
	// 		compatible = "regulator-fixed";
	// 		reg = <66>;
	// 		regulator-name = "wm8904-supply";
	// 	};
	// };

	i2c@c250000 {
		//add
		wm8904_codec: wm8904@1a {
			compatible = "wlf,wm8904";
			status ="okay";
			reg = <0x1a>;
			// #sound-dai-cells = <1>;
			// sound-name-prefix = "WM";
			// clocks = <&wm8904_mclk>;
			// clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
			clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
			clock-names = "mclk";
			// DCVDD-supply = <&wm8904-audio>;
			// DBVDD-supply = <&wm8904-audio>;
			// AVDD-supply = <&wm8904-audio>;
			// CPVDD-supply = <&wm8904-audio>;
			// MICVDD-supply = <&wm8904-audio>;
			port {
				wm8904_ep: endpoint {
					remote-endpoint = <&i2s1_dap_ep>;
					mclk-fs = <256>;
					link-name = "wm8904-playback";
				};
			};
		};
	};

	/* Default for all I2S is long fsync width(31) */
	aconnect@2a41000 {
		// compatible = "nvidia,tegra210-aconnect";
    	// status = "okay";
		ahub {
			/* I2S4 in Short frame sync for BT SCO */
			i2s@2901300 {
				bclk-ratio = <4>;
				status = "okay";
			};
		};

	};

	tegra_acsl_audio: acsl_audio {
		status = "okay";
	};

	hda@3510000 {
		status = "okay";

		nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
	};

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";
		// nvidia,model = "NVIDIA Jetson AGX Xavier APE";
		// nvidia,num-codec-link = <1>;
		// nvidia,num-clk = <6>;
		// nvidia,clk-rates = < 270950400  /* PLLA_x11025_RATE */
		// 						11289600   /* AUD_MCLK_x11025_RATE */
		// 						45158400   /* PLLA_OUT0_x11025_RATE */
		// 						45158400   /* AHUB_x11025_RATE */
		// 						245760000  /* PLLA_x8000_RATE */
		// 						12288000   /* AUD_MCLK_x8000_RATE */
		// 						49152000   /* PLLA_OUT0_x8000_RATE */
		// 						49152000 >;/* AHUB_x8000_RATE */
		// nvidia,xbar = <&tegra_axbar>;
		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
			 <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		clock-names = "pll_a", "pll_a_out0", "extern1";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		nvidia-audio-card,widgets =
		    "Headphone",    "WM Headphone Jack",
			"Microphone",   "WM Mic",
			"Line",         "WM Line In Jack",
			"Line",         "WM Line In Jack",
			"Microphone",	"WM MICBIAS";
		//add
		nvidia-audio-card,routing =
		    "WM Headphone", "WM HP_L",
    		"WM Headphone", "WM HP_R",
			"WM Headphone Jack", "WM HPOUTL",		
			"WM Headphone Jack", "WM HPOUTR",			
			"WM IN2L", "WM Line In Jack",			
			"WM IN2R", "WM Line In Jack",		
			"WM Mic", "WM MICBIAS",			
			"WM IN1L", "WM Mic",
			"WM Headphone", "WM HPOUTL",
    		"WM Headphone", "WM HPOUTR";
		nvidia-audio-card,mclk-fs = <256>;
		//  nvidia-audio-card,dai-link@1{
        //             link-name = "wm8904-playback";
        //             cpu-dai = <&tegra_i2s1>;
        //             codec-dai = <&wm8904_codec>;
        //             cpu-dai-name = "I2S1";
        //             codec-dai-name = "wm8904-hifi";
        //             format = "i2s";
        //             bitclock-slave;
        //             frame-slave;
        //             bitclock-noninversion;
        //             frame-noninversion;
        //             bit-format = "s16_le";
        //             bclk_ratio = <0>;
        //             srate = <48000>;
        //             num-channel = <2>;
        //             ignore_suspend;
        //             name-prefix = "WM";
        //             status = "okay";
        //     };
		

	};

	tegra_sound_graph: sound_graph {
		compatible = "nvidia,tegra186-audio-graph-card";

		/*
		 * Tegra audio graph card is based on uptream generic audio
		 * graph sound card. In future there is plan to use this
		 * as default sound card.
		 */
		status = "disabled";

		dais = /* ADMAIF (FE) Ports */
		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
		       <&admaif10_port>, <&admaif11_port>, <&admaif12_port>,
		       <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>,
		       <&admaif19_port>, <&admaif20_port>,

		       /* ADSP (FE) Ports */
		       <&adsp_pcm1_port>, <&adsp_pcm2_port>,
		       <&adsp_compr1_port>, <&adsp_compr2_port>,

		       /* XBAR I/O ports */
		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,

		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
		       <&xbar_dmic3_port>, <&xbar_dmic4_port>,

		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,

		       /* XBAR HW accelerator ports */
		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,

		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,

		       <&xbar_afc1_in_port>, <&xbar_afc2_in_port>,
		       <&xbar_afc3_in_port>, <&xbar_afc4_in_port>,
		       <&xbar_afc5_in_port>, <&xbar_afc6_in_port>,

		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
		       <&xbar_asrc_in7_port>, <&xbar_arad_port>,

		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,

		       <&xbar_ope1_in_port>,

		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,

		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,

		       /* BE I/O Ports */
		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>,
		       <&i2s4_port>, <&i2s5_port>, <&i2s6_port>,

		       <&dmic1_port>, <&dmic2_port>, <&dmic3_port>,
		       <&dmic4_port>,

		       <&dspk1_port>, <&dspk2_port>,

		       /* BE HW accelerator ports */
		       <&sfc1_out_port>, <&sfc2_out_port>,
		       <&sfc3_out_port>, <&sfc4_out_port>,

		       <&mvc1_out_port>, <&mvc2_out_port>,

		       <&afc1_out_port>, <&afc2_out_port>,
		       <&afc3_out_port>, <&afc4_out_port>,
		       <&afc5_out_port>, <&afc6_out_port>,

		       <&asrc_out1_port>, <&asrc_out2_port>,
		       <&asrc_out3_port>, <&asrc_out4_port>,
		       <&asrc_out5_port>, <&asrc_out6_port>,

		       <&mixer_out1_port>, <&mixer_out2_port>,
		       <&mixer_out3_port>, <&mixer_out4_port>,
		       <&mixer_out5_port>,

		       <&ope1_out_port>,

		       <&amx1_out_port>, <&amx2_out_port>,
		       <&amx3_out_port>, <&amx4_out_port>,

		       <&adx1_out1_port>, <&adx1_out2_port>,
		       <&adx1_out3_port>, <&adx1_out4_port>,
		       <&adx2_out1_port>, <&adx2_out2_port>,
		       <&adx2_out3_port>, <&adx2_out4_port>,
		       <&adx3_out1_port>, <&adx3_out2_port>,
		       <&adx3_out3_port>, <&adx3_out4_port>,
		       <&adx4_out1_port>, <&adx4_out2_port>,
		       <&adx4_out3_port>, <&adx4_out4_port>,

		       /* ADSP related ports */
		       <&adsp_admaif1_port>, <&adsp_admaif2_port>,
		       <&adsp_admaif3_port>, <&adsp_admaif4_port>,
		       <&adsp_admaif5_port>, <&adsp_admaif6_port>,
		       <&adsp_admaif7_port>, <&adsp_admaif8_port>,
		       <&adsp_admaif9_port>, <&adsp_admaif10_port>,
		       <&adsp_admaif11_port>, <&adsp_admaif12_port>,
		       <&adsp_admaif13_port>, <&adsp_admaif14_port>,
		       <&adsp_admaif15_port>, <&adsp_admaif16_port>,
		       <&adsp_admaif17_port>, <&adsp_admaif18_port>,
		       <&adsp_admaif19_port>, <&adsp_admaif20_port>,

		       <&admaif1_codec_port>, <&admaif2_codec_port>,
		       <&admaif3_codec_port>, <&admaif4_codec_port>,
		       <&admaif5_codec_port>, <&admaif6_codec_port>,
		       <&admaif7_codec_port>, <&admaif8_codec_port>,
		       <&admaif9_codec_port>, <&admaif10_codec_port>,
		       <&admaif11_codec_port>, <&admaif12_codec_port>,
		       <&admaif13_codec_port>, <&admaif14_codec_port>,
		       <&admaif15_codec_port>, <&admaif16_codec_port>,
		       <&admaif17_codec_port>, <&admaif18_codec_port>,
		       <&admaif19_codec_port>, <&admaif20_codec_port>;

		label = "NVIDIA Jetson AGX Xavier APE";

		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		clock-names = "pll_a", "plla_out0";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		widgets = "Headphone",	"CVB-RT Headphone Jack",
			  "Microphone", "CVB-RT Mic Jack",
			  "Speaker",	"CVB-RT Int Spk",
			  "Microphone", "CVB-RT Int Mic";

		routing = "CVB-RT Headphone Jack", "CVB-RT HPO L Playback",
			  "CVB-RT Headphone Jack", "CVB-RT HPO R Playback",
			  "CVB-RT IN1P",	   "CVB-RT Mic Jack",
			  "CVB-RT IN2P",	   "CVB-RT Mic Jack",
			  "CVB-RT Int Spk",	   "CVB-RT SPO Playback",
			  "CVB-RT DMIC L1",	   "CVB-RT Int Mic",
			  "CVB-RT DMIC L2",	   "CVB-RT Int Mic",
			  "CVB-RT DMIC R1",	   "CVB-RT Int Mic",
			  "CVB-RT DMIC R2",	   "CVB-RT Int Mic";

		/*
		 * For codec2codec based DAI link design this is required.
		 * For DPCM based design, this is optional and instead
		 * it will be picked from codec port node.
		 */
		mclk-fs = <256>;
	};
};

/*
 * Default config for all I2S dai links are
 * format = "i2s", bitclock-slave, frame-slave,
 * bitclock-noninversion, frame-noninversion,
 * Any change from default needs override on
 * platform specific files.
 */

/* Override with Codec entries */
&i2s1_to_codec {
	link-name = "wm8904-playback";
	// link-name = "rt5658-playback";
	bitclock-master;
    frame-master;
	codec {
		sound-dai = <&wm8904_codec>;
		prefix = "WM";
	};
};

hdr40_snd_link_i2s: &i2s2_to_codec { };

/* Override with BT SCO entries */
&i2s4_to_codec {
	format = "dsp_a";
	bitclock-inversion;
};

/* Audio graph related bindings */
&i2s1_dap_ep {
	remote-endpoint = <&wm8904_ep>;
};

&i2s4_dap_ep {
	dai-format = "dsp_a";
	bitclock-inversion;
};

hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };

If nothing goes wrong, I’ll refresh to Jetson, thank you very much

why did you remove this?

Please keep it and if you get any error due to that then remove and try.

At the place of CVB-RT, it should be WM.

// clocks = <&wm8904_mclk>;|

// clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;|
clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;|

Which three clocks are good? If you use customization, add this

	// clocks {
	// 	wm8904_mclk: wm8904_mclk {
	// 	compatible = "fixed-clock";
	// 	#clock-cells = <0>;
	// 	// clock-frequency = <49152000>;
	// 	clock-frequency = <12288000>;
	// 	clock-output-names = "wm8904-mclk";
	// 	status = "okay";
	// 	};
	// };

Can you help me see the card kernel printing information? There seems to be some problem.


dmesg.txt (79.5 KB)

https://docs.nvidia.com/jetson/archives/r35.1/DeveloperGuide/text/SD/Communications/AudioSetupAndDevelopment.html#add-an-initialization-function-for-the-codec
I followed the tutorial to add some code registration to this file.
/kernel/kernel-5.10/sound/soc/tegra/tegra_codecs.c

static int tegra_machine_wm8904_init(struct snd_soc_pcm_runtime *rtd)
{
	struct device *dev = rtd->card->dev;
	int err;

	err = snd_soc_dai_set_sysclk(rtd->dais[rtd->num_cpus], WM8904_CLK_AUTO,
				     12288000, SND_SOC_CLOCK_IN);
	if (err) {
		dev_err(dev, "failed to set wm8904 sysclk!\n");
		return err;
	}
	dev_info(dev, "set to wm8904 sysclk .\n");
	return tegra_audio_dai_init(rtd);
}


int tegra_codecs_init(struct snd_soc_card *card)
{
struct snd_soc_dai_link *dai_links = card->dai_link;
int i;

if (!dai_links || !card->num_links)
	return -EINVAL;

for (i = 0; i < card->num_links; i++) {
	if (strstr(dai_links[i].name, "rt565x-playback") ||
	    strstr(dai_links[i].name, "rt5640-playback") ||
	    strstr(dai_links[i].name, "rt565x-codec-sysclk-bclk1") ||
	    strstr(dai_links[i].name, "rt5640-codec-sysclk-bclk1"))
		dai_links[i].init = tegra_machine_rt56xx_init;
	else if (strstr(dai_links[i].name, "fe-pi-audio-z-v2"))
		dai_links[i].init = tegra_machine_fepi_init;
	else if (strstr(dai_links[i].name, "respeaker-4-mic-array"))
		dai_links[i].init = tegra_machine_respeaker_init;
	else if (strstr(dai_links[i].name, "wm8904-playback"))
		dai_links[i].init = tegra_machine_wm8904_init;
}

return 0;

}

int tegra_codecs_runtime_setup(struct snd_soc_card *card, unsigned int srate,
			       unsigned int channels, unsigned int aud_mclk)
{
	struct snd_soc_pcm_runtime *rtd;
	int err;

	rtd = get_pcm_runtime(card, "rt565x-playback");
	if (rtd) {
		err = snd_soc_dai_set_sysclk(rtd->dais[rtd->num_cpus],
					     RT5659_SCLK_S_MCLK, aud_mclk,
					     SND_SOC_CLOCK_IN);
		if (err < 0) {
			dev_err(card->dev, "dais[%d] clock not set\n",
				rtd->num_cpus);
			return err;
		}
	}

	rtd = get_pcm_runtime(card, "rt5640-playback");
	if (rtd) {
		err = snd_soc_dai_set_sysclk(rtd->dais[rtd->num_cpus],
					     RT5640_SCLK_S_MCLK, aud_mclk,
					     SND_SOC_CLOCK_IN);
		if (err < 0) {
			dev_err(card->dev, "dais[%d] clock not set\n",
				rtd->num_cpus);
			return err;
		}
	}

	rtd = get_pcm_runtime(card, "wm8904-playback");
	if (rtd) {
		err = snd_soc_dai_set_sysclk(rtd->dais[rtd->num_cpus],
					     RT5640_SCLK_S_MCLK, aud_mclk,
					     SND_SOC_CLOCK_IN);
		if (err < 0) {
			dev_err(card->dev,
				"wm8904-playback dais[%d] clock not set\n",
				rtd->num_cpus);
			return err;
		}
	}