How do I get report of error detection and correction of ECC memory of TX2i?

According to the spec of tx2i, it has ECC supported memories. How do I get a report of error detection and correction of the memories?

As far as I surveyed, there is no /sys/devices/system/edac/ directory on tx2i Linux.

EDAC kernel driver is not used to report DRAM ECC errors. Typically because Kernel is running on DRAM. ARM R5 engine, SCE R5 is used to handle DRAM ECC interrupts for single and double bit

Is it possible to know when ARM R5 engine detects ECC interrupts?

Will It be reported to kernel log such as syslog?

When either SBE/DBE is detected by the HW, there are prints in the system log. In the case of SBE, the errors are reported on uart and corrected. In the case of DBE, the DBE error data is printed on the system log, the system is rebooted and the DBE dram page is blacklisted. You need to check the bad page partition and check the list of bad pages blacklisted.

DBE dram page is blacklisted

Where can I get the blacklist? Is it dumped on some file?

When either SBE/DBE is detected by the HW, there are prints in the system log.

Could you share some example of system log when SBE and DBE is detected?

@mantravadi_karthik @Bibek
Is it possible to test error detection and correction feature of tx2i? For example, is it possible to modify a bit of memory artificially to cause ecc correction?

we do test both single and double bit error generation, but the testing is quite intrusive which is not curated to be shared.
Meanwhile you can enable the kernel driver mcerr_ecc_t18x.c
This has a debug hook to increase the error rate. And run the system at least emc freq which is 204Mhz . stress memory, and you should be able to see some reporting.
remove this flag from kernel dt
mc {
ecc_on_camera_fw;
}