# How do I use I2S0 on my custom carrier

**URL:** <https://forums.developer.nvidia.com/t/how-do-i-use-i2s0-on-my-custom-carrier/257711>\
**Category:** Jetson Nano\
**Tags:** board-design, i2s\
**Created:** [June 25, 2023, 5:57am UTC](https://forums.developer.nvidia.com/t/how-do-i-use-i2s0-on-my-custom-carrier/257711 "2023-06-25T05:57:02Z")\
**Posts on this page:** 4\
**Page:** 1

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**Author:** ![enc0der](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@enc0der](https://forums.developer.nvidia.com/u/enc0der)\
**Post date:** [June 25, 2023, 5:57am UTC](https://forums.developer.nvidia.com/t/how-do-i-use-i2s0-on-my-custom-carrier/257711/1 "2023-06-25T05:57:02Z")

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I’ve been reading through the forum and it is just not clear to me what I need to do to the dts to enable I2S0 so it shows up in aplay -l

I’ve used this chip with other ARM cores, so I am familiar with programming it. The codec works as master and is using AUD\_DIN, AUD\_CLK and AUD\_FS on edge pins 195, 199 and 197. Reset is set to pin 181. For control, SPI is used, which I am using on 91,93,89 and 97 (which is SPI0).

I see the dev board is using I2S4. I tried to go through the DTB from the jetsonIO to see if I could figure it, but it was definitely not clear to me what to change to map things over.

Can anyone give me some clues on this?

Rick

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<div class="post-metadata">

**Author:** ![enc0der](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@enc0der](https://forums.developer.nvidia.com/u/enc0der)\
**Post date:** [June 25, 2023, 6:10am UTC](https://forums.developer.nvidia.com/t/how-do-i-use-i2s0-on-my-custom-carrier/257711/2 "2023-06-25T06:10:33Z")

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What is really confusing is that in the pinmux, on the left side it refers to I2S0 but on the right side, I2S4

 ![Screen Shot 2023-06-25 at 2.09.33 AM](https://global.discourse-cdn.com/nvidia/original/4X/5/8/9/5890d9028847966d76ac30ed908ed79e3603ebaa.png)

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**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\
**Post date:** [June 27, 2023, 5:27pm UTC](https://forums.developer.nvidia.com/t/how-do-i-use-i2s0-on-my-custom-carrier/257711/4 "2023-06-27T17:27:17Z")

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Have reference to below document.

> **[Jetson%20Nano-Z%20Pin%20and%20Function%20Names%20Guide%20AN%20DA-10193-001v1.0.pdf](https://docs-download.oss-cn-shanghai.aliyuncs.com/%E5%8E%82%E5%95%86%E8%B5%84%E6%96%99/%E8%8B%B1%E4%BC%9F%E8%BE%BE/%E8%8B%B1%E4%BC%9F%E8%BE%BE%E7%A1%AC%E4%BB%B6/Jetson%20Nano-Z/Jetson%20Nano-Z%20Pin%20and%20Function%20Names%20Guide%20AN%20DA-10193-001v1.0.pdf)**
>
> 400.05 KB

Pinmux  
The Jetson Nano module pinmux (pin multiplexing) spread sheet has the module pin names and pin numbers in the first two columns, and the SoC ball name in the 3rd column. The GPIOs and SFIO functions are covered in the pin muxing area.

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**Author:** ![system](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/system/32/68080_2.png) [@system](https://forums.developer.nvidia.com/u/system)\
**Post date:** [July 19, 2023, 4:45am UTC](https://forums.developer.nvidia.com/t/how-do-i-use-i2s0-on-my-custom-carrier/257711/6 "2023-07-19T04:45:44Z")

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