Thread blocks are rasterized into warps (32 threads) and warps are launched on SMSP (SM sub-partitions == warps schedulers).
a.
- The programming model provides no guarantee regarding the assignment of thread blocks to SMs or warps to SM sub-partitions (warp schedulers).
- The programming model does guarantee that all threads in a thread block will be co-resident on the same SM.
- There is no guarantee regarding the order of execution of warps. Scheduling order is not influenced by the warp ID.
- On most GPUs the lower 2-bits of the warp ID indicate the SM sub-partition.
b.
- Yes. The co-location of thread blocks on SMs and assignment of warps to SMSP can impact kernel performance as each warp contends for shared resources including instruction issue slots, instruction pipelines, and cache accesses.
- In terms of warps on an individual SM the goal is to have equal number of warps per SMSP. The CUDA profilers collect useful statistics per SM and per SMSP so you can determine if there is a balance issue.
- The CUDA API does not provide any controls regarding assignment of work to SMs or warps to warp schedulers. MPS server provides some control at a higher level.