How to Access PCIe ATU Registers

Hi.

I am currently running Jetpack 5.1 on Jetson AGX Xavier. How do I access the PCIe ATU registers mentioned in the Xavier Technical Reference Manual? I tried reading the value at address 0x3a040000 from a linux module, but ran into kernel panic.

Is 0x3a040000 the correct offset for accessing PCIe registers? How can I access the PCIe ATU registers without kernel panic?

The steps I follow are these:

  1. Use phys_to_virt(0x3a040000) to get virtual address.
  2. Read the value at this virtual address using readl() API.

When I insmod my module, I get kernel panic. How may I resolve this issue?

Regards,
Sana Ur Rehman

Anyone? How can I program the PCIe ATU?

May I know why you need to access the register?

@kayccc ,

I wish to use Tegra’s integrated DMA engine to send data to a PCIe device. I found this thread (DMA to PCIe BARs - #3 by vidyas), which indicates that this could be achieved using ATU.

Also, for using the PCIe root port integrated DMA engine (in pcie-tegra-dw.c), I need the ATU DMA base address, otherwise I can’t use the DMA.

Regards,
Sana Ur Rehman

I was eventually able to access the ATU registers by using ioremap() instead of phys_to_virt() in my driver.

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