OK，I try to describe it clearly.
Before, I tested Bidirectional Data Transfer between Orin device(EP) and x86 device (RP) successfully.
See previous discussion for details:
https://forums.developer.nvidia.com/t/fail-to-testing-bidirectional-data-transfer/232676
Now, I want to test the performance of the data transfer between Orin and x86.
From the Hardware Layout Info:
I thought the theoretical bandwidth of transmission was 16GB/s (gen4.0, *8)
But from the pci information I see on the EP side (Orin), the width is only x1.
I read the documentation of EP Mode again:
https://docs.nvidia.com/jetson/archives/r35.1/DeveloperGuide/text/SD/Communications/PcieEndpointMode.html#sd-communications-pcieendpointmode
It seems to require me to rewrite the nvidia/drivers/pci/dwc/pcie-tegra.c file ?
I’m sorry that I have relatively little experience in kernel and drivers, and I’m still learning by doing. If the information I provided is still not enough, you can bring it up and I’ll continue to add.
Thx :)