However, the system logs on the Jetson device only displayed the following message:
Are there additional options or steps required to properly configure the PCIe endpoint?
For example, should I modify the DTB-related settings or make other adjustments to properly configure the PCIe endpoint?
How can I verify if the PCIe endpoint is properly configured on the Jetson Orin NX? Does the log I shared earlier indicate that the PCIe endpoint has been successfully set up?
I want to connect it to a custom board acting as the Root Complex, but when I run lspci, the Jetson Orin NX does not appear. Could this indicate an issue with the custom board? If it does appear, I am curious about the name it would display under.
After performing “Connecting and Configuring the Devices” and booting the root device, I moved to the directory:
/sys/kernel/debug/14160000.pcie-ep_epf_dma_test/
There, I input the required configuration values and executed cat edmalib_test. However, it returned RP dma address null.
Additionally, when running lspci on the custom board, the NVIDIA-related device is still not detected.
Are there any additional settings I need to configure for the “custom carrier board root complex dma address” or “jetson orin nx endpoint”
or have to change switchutils settings on custom carrier board?
I am talking about lspci on your RP side shall see the device first. Make sure that happened first. If that one didn’t happen, then no need to care about that error log.
Also,
We kept the custom board in BIOS mode and executed the command on the jetson:
What are you talking about here? I have no idea what you are trying to say. What custom board and what BIOS mode you are talking about?
After checking the PCIe pin map, there doesn’t appear to be any issue between the custom board and the Jetson Orin NX
On the flashed Jetson device, I inspected the file /boot/dtb/kernel_tegra234-p3768-0000+p3767-0000-nv.dtb
using the command fdtdump kernel_tegra234-p3768-0000+p3767-0000-nv.dtb | less
and found that pcie-ep@14160000 is set to disabled.
Additionally, I found an x86 driver related to AGX Orin for PCIe communication between x86 and AGX Orin. In this code, if I modify only the line #define PCI_DEVICE_ID_NVIDIA_JETSON_AGX_NETWORK 0x2296,
would that be sufficient? If so, could you provide the correct Device ID?