We use jetpack 5.1.2 and require serial port UART 1 to support a baud rate configuration of 10Mbps. We can configure up to 4Mbps using STTY configuration. How can we configure 10Mbps?
Read the Orin-TRM-DP10508002-v1.0p. pdf manual, UART supports up to 12Mbps
The error message for configuring a 10Mbps baud rate using STTY is as follows:
We tried to modify the kernel, but still couldn’t achieve a 10Mbps baud rate configuration.
include/uapi/asm-generic/termbits.h：
Add: # define B10000000 0010020
Are you using the devkit or custom board for AGX Orin?
Could you verify with the latest JP5.1.4 or JP6.2?
If you want to use UART with higher, you may need to configure its parent clock for higher frequency.
And you have to enable RTS/CTS to prevent the data loss.
For reference, L4T R35.4.1 (what actually got flashed) is a JetPack/SDK Manager 5.x (installer). You can find everything specific to that release from here: https://developer.nvidia.com/linux-tegra
The latter URL tends to be about the hardware and/or its limits, while the former URL is more about the software development (but it crosses over). I can’t answer how to change the parent clock, but documents in the latter should provide some naming of specific hardware parts, and then possibly a device tree in the first URL (which you no doubt already have flashed to your Jetson) is how one would change that.
You can view the kernel’s view of the running device tree via the “/proc/device-tree/” directory. This is a reflection in RAM of the existing tree. You can export this to source format: dtc -I fs -O dts -o extracted.dts /proc/device-tree
(if you don’t have dtc, then “sudo apt-get install device-tree-compiler”)
If you know which device tree binary was used for boot (and serial console logs are the best knowledge of that; be sure to remove the “quiet” from extlinux.conf). To convert example.dtb to source: dtc -I dtb -O dts -o example.dts example.dtb
Do note though that sometimes the documents regarding the Jetson hardware module refers to the same hardware “off by 1” compared to the software; e.g., as a contrived example, make sure that if you were to refer to something like “UART1” that it is “UART1” on both software and hardware…there could actually be “UART2” in one document referring to what the other says is “UART1”. I don’t know specifically if this is the case for UARTs, but it saves a lot of time if you are aware that this is a possibility.
Incidentally, 10 Mb/s is very hard to achieve. You’ll need short cables, possibly shielded, and as @KevinFFF mentions, if you don’t enable CTS/RTS flow control I don’t think you stand a chance of it working without errors.
yes， we are use jetpack5.1.2.
root@tegra-ubuntu:/# cat /sys/kernel/debug/bpmp/debug/clk/uarta/parent
pllp_out0
root@tegra-ubuntu:/# cat /sys/kernel/debug/bpmp/debug/clk/uarta/max_rate
68000000
I’ve checked this with internal before.
You need the specific debug bpmp-fw for this use case since high baudrate for these interfaces may depend on the design of the carrier board and the most cases do not need them. As a result, we configure its clock frequency as 68MHz by default.
