How to confirm time gap between PCIe RESET is released and PCIe device identified by system on Xavier-NX system?

Autonomous Machines Jetson & Embedded Systems Jetson Xavier NX
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1

We used PCIe-USB3 controller (Fresco/FL1100EX) to design our Xavier-NX system.We have an USB device lost issue now.The fail phenomenon is system will randomly lost USB device after we warm reboot system.
After I check,I discover PCIe RESET release time is at system is into kernel phase.I want to confirm time gap between PCIe RESET is released and PCIe device identified by system.How do I do?

3

Could anybody answer my question?

4

Here is the sequence followed

  1. Assert PERST
  2. Wait for 100 us
  3. De-assert PERST
  4. Wait for 100 ms
  5. Start checking for the link up (this will go on for another 200 ms and if the link is not up at the end of 200 ms , then, we declare that the link is down)

Above sequence can be found in tegra_pcie_dw_host_init() API in pcie-tegra.c file.
This sequence is inline with the PCIe spec.