How to connect Jetson Xavier NX to FPGA via PCIe and load FPGA program first after Linux startup, and then link it

Jetson Xavier NX is connected to FPGA through PCIe bus. Now, I want Linux to start up first, and then load FPGA program through SPI. After loading FPGA program, I delay PCIe link. I try to add usleep or msleep in the tegra_pcie_cw_host_init function to delay the link work with FPGA. At this time, I will continue to scan and wait for the link in this function. May I ask what I should do to achieve my goal

通过pci_rescan已解决

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