# How to enable UART7 (D8, D5) as normal UART like other UART (uartc@C280000)

**URL:** <https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572>\
**Category:** Jetson TX2\
**Created:** [October 27, 2017, 2:58am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572 "2017-10-27T02:58:01Z")\
**Posts on this page:** 20\
**Page:** 1

<div class="post-metadata">

**Author:** ![JasonFan](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@JasonFan](https://forums.developer.nvidia.com/u/JasonFan)\
**Post date:** [October 27, 2017, 2:58am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/1 "2017-10-27T02:58:01Z")

</div>

Hi Sir/Madam,

I set pinmux spreadsheet (D8, D5) and generate dti as following

```auto
uart7_tx_pw6 {
				nvidia,pins = "uart7_tx_pw6";
				nvidia,function = "uartg";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart7_rx_pw7 {
				nvidia,pins = "uart7_rx_pw7";
				nvidia,function = "uartg";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

```

I think UART7 will work but I can’t find signal. So could you confirm which tty is connected to UART7?

Thank you.

---

<div class="post-metadata">

**Author:** ![linuxdev](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/linuxdev/32/10243_2.png) [@linuxdev](https://forums.developer.nvidia.com/u/linuxdev)\
**Post date:** [October 27, 2017, 6:40pm UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/2 "2017-10-27T18:40:26Z")

</div>

I don’t know about this UART, but by tty are you asking about which pins on the carrier board for custom use?

---

<div class="post-metadata">

**Author:** ![JasonFan](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@JasonFan](https://forums.developer.nvidia.com/u/JasonFan)\
**Post date:** [October 30, 2017, 6:37am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/3 "2017-10-30T06:37:39Z")

</div>

Hi linuxdev,

We have our custom board and use UART7 to control device. Currently, we try all tty device in Linux but there is no any signal. So we want to know which tty device in Linux is connected to UART7(D8, D5). It will be easy for us to debug. Thank you.

---

<div class="post-metadata">

**Author:** ![linuxdev](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/linuxdev/32/10243_2.png) [@linuxdev](https://forums.developer.nvidia.com/u/linuxdev)\
**Post date:** [October 30, 2017, 9:16pm UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/4 "2017-10-30T21:16:08Z")

</div>

I can’t answer the question, but I see in the schematics D5 is UART4\_RX, and D8 is UART4\_TX. There are cases where the carrier board “UART#” differs from the “UART#” of the module itself.

In the case of the dev carrier this routes to the debug header. The reason this matters is that I see an ECN stating that a pull down was added to UART4\_TX for bug 200160113 (which I know nothing about, but perhaps this might be needed in your design as well).

Is it possible that what you really want is UART4?

---

<div class="post-metadata">

**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\
**Post date:** [November 8, 2017, 8:24am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/5 "2017-11-08T08:24:35Z")

</div>

hello JasonFan,

please check tegra\_uart\_probe() function at below path and confirm which tty device you’re used.

```auto
R28.1/kernel/kernel-4.4/drivers/tty/serial/serial-tegra.c

```

---

<div class="post-metadata">

**Author:** ![JasonFan](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@JasonFan](https://forums.developer.nvidia.com/u/JasonFan)\
**Post date:** [November 13, 2017, 4:45am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/6 "2017-11-13T04:45:34Z")

</div>

Hi JerryChang,

I try to add usrt7 (serial@c290000) to dtsi file and looks like working.

```auto
serial@c290000{
   compatible = "nvidia, tegra186-hsuart"
   status = "okay"
}

```

But got error from tegra\_uart\_probe().

```auto
serial-tegra c290000.serial: Failed to add uart port, err -22
serial-tegra: probe of c290000.serial failed with error -22

```

22 /\* Invalid argument \*/

Is there anything I miss or need to check?

Is the address of UART7 UARTG(c290000)

Thank you

---

<div class="post-metadata">

**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\
**Post date:** [November 14, 2017, 9:22am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/7 "2017-11-14T09:22:40Z")

</div>

hello JasonFan,

any kernel related failure message shown for reference?  
thanks

---

<div class="post-metadata">

**Author:** ![JasonFan](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@JasonFan](https://forums.developer.nvidia.com/u/JasonFan)\
**Post date:** [November 14, 2017, 10:20am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/8 "2017-11-14T10:20:05Z")

</div>

Hi JerryChang,

The kernel related failure messages are as below

```auto
serial-tegra c290000.serial: Failed to add uart port, err -22
serial-tegra: probe of c290000.serial failed with error -22

```

The whole log is attachement

Thanks

[1113.log](https://forums.developer.nvidia.com/uploads/short-url/q3tTLChheQdJCBCLyMtx9BYjlxK.log) (90.1 KB)

---

<div class="post-metadata">

**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\
**Post date:** [November 16, 2017, 6:40am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/9 "2017-11-16T06:40:08Z")

</div>

hello JasonFan,

according to your kernel message, here are all tty devices being detected.  
seems you did not add UART(serial@c290000) correctly.

```auto
[3.027817] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 37, base_baud = 0) is a TEGRA_UART
[3.029079] c280000.serial: ttyTHS2 at MMIO 0xc280000 (irq = 38, base_baud = 0) is a TEGRA_UART
[3.030399] 3130000.serial: ttyTHS3 at MMIO 0x3130000 (irq = 39, base_baud = 0) is a TEGRA_UART

```

---

<div class="post-metadata">

**Author:** ![JasonFan](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@JasonFan](https://forums.developer.nvidia.com/u/JasonFan)\
**Post date:** [November 16, 2017, 6:49am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/10 "2017-11-16T06:49:20Z")

</div>

Hi JerryChang,

Yes. I know ttyTHS1~THS3 can work so I add UART7(serial@c290000) like them. (you can see my previous post)  
The problem is UART7 can’t be added or fail to prob after I add it in device tree.

According to “TX2\_Parker\_TRM\_DP07821001p.pdf” it describes UART7 as following.

UART7/UARTG: Primary debug of all subsystems  
As such, a new debug UART, interface name UART7 with only the TXD/RXD pins is added in Paker under the control of the dedicated new UART controller (separate from all functional UARTs)

It looks like UART7 is used for another purpose of TX2 original design?  
So my question is how to modify/enable UART7 to a normal uart like other uarts (for example: uartc@C280000)  
Or UART7 can’t be used for normal UART function?

I found another topic that also dusscuss UART7  
[url][UART7 unusable because of strange debugging console - Jetson TX2 - NVIDIA Developer Forums](https://devtalk.nvidia.com/default/topic/1025993/jetson-tx2/uart7-unusable-because-of-strange-debugging-console/post/5220145/#5220145%5B/url%5D)

Thanks

---

<div class="post-metadata">

**Author:** ![JasonFan](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@JasonFan](https://forums.developer.nvidia.com/u/JasonFan)\
**Post date:** [November 24, 2017, 6:09am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/11 "2017-11-24T06:09:58Z")

</div>

any update? Thanks.

---

<div class="post-metadata">

**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\
**Post date:** [November 24, 2017, 6:48am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/12 "2017-11-24T06:48:53Z")

</div>

hello JasonFan,

we’re investigating this internally,  
will get back to you, thanks

---

<div class="post-metadata">

**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\
**Post date:** [December 8, 2017, 7:06am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/13 "2017-12-08T07:06:47Z")

</div>

hello JasonFan,

please convert below BPMP DTB file with the dtc tool, and please changing the port number to 255 and converted it back to DTB. thanks  
tegra186-a02-bpmp-quill-p3310-1000-c01-00-te770d-ucm2.dtb

---

<div class="post-metadata">

**Author:** ![JasonFan](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@JasonFan](https://forums.developer.nvidia.com/u/JasonFan)\
**Post date:** [December 11, 2017, 5:12am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/14 "2017-12-11T05:12:38Z")

</div>

Hi JerryChang,

Do you mean modify as the following?

```auto
serial{
       port = <0xff>;
       has_input;
};

```

I did it as above and re-flash by “sudo ./flash.sh jetson-tx2 mmcblk0p1” but still got the same error messages

```auto
serial-tegra c290000.serial: Failed to add uart port, err -22
serial-tegra: probe of c290000.serial failed with error -22

```

Thanks

---

<div class="post-metadata">

**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\
**Post date:** [December 11, 2017, 8:22am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/15 "2017-12-11T08:22:54Z")

</div>

hello JasonFan,

UART7 device is added successfully just by changing the DT status even without disabling in BPMP DTB.  
please make sure your serial@c290000 serial port status has changed from ‘disabled’ to ‘okay’.  
thanks

```auto
serial@c290000 {
...
    status = "okay";

```

---

<div class="post-metadata">

**Author:** ![JasonFan](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@JasonFan](https://forums.developer.nvidia.com/u/JasonFan)\
**Post date:** [December 11, 2017, 8:53am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/16 "2017-12-11T08:53:56Z")

</div>

Hi JerryChang,

I try to change status = “disable” to “okay” in tegra186-soc-uart.dtsi.

And also try to add the following codes in tegra186-quill-p3310-c03-00-base.dts

```auto
serial@c290000{
   compatible = "nvidia, tegra186-hsuart"
   status = "okay"
}

```

Both ways are failed to add uart port.

I also try to add the other serial (serial@3140000) in tegra186-quill-p3310-c03-00-base.dts and ttyTHS4 is added successfully.  
Please check the log.

```auto
serial@3140000{
   compatible = "nvidia, tegra186-hsuart"
   status = "okay"
}

```

serial@3150000 has the same issue to serial@c290000(uart7/uartg) so I think serial@3150000 and serial@c290000(uart7/uartg) should be occupied by other functions.

PS: I can’t find any information in doc for uartf (serial@3150000) but it doesn’t matter.

Thanks  
[uart\_1211.log](https://forums.developer.nvidia.com/uploads/short-url/7t93tm8sSlGFUHB4SxG9mowIGbt.log) (90.5 KB)

---

<div class="post-metadata">

**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\
**Post date:** [December 13, 2017, 6:48am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/17 "2017-12-13T06:48:03Z")

</div>

hello JasonFan,

had you compile the device tree correctly?  
i’m able to saw the UART7 device is added successfully just by changing the DT status,  
share the diff for your reference.

```auto
--- a/kernel-dts/t18x-common-platforms/tegra186-quill-common.dtsi
+++ b/kernel-dts/t18x-common-platforms/tegra186-quill-common.dtsi
@@ -56,6 +56,11 @@
                status = "okay";
        };
 
+ serial@c290000 {
+ compatible = "nvidia,tegra186-hsuart";
+ status = "okay";
+ };

```

before,

```auto
serial@c290000 {
		compatible = "nvidia,tegra186-hsuart";
		#stream-id-cells = <0x1>;
		reg = <0x0 0xc290000 0x0 0x40>;
		reg-shift = <0x2>;
		interrupts = <0x0 0x76 0x4>;
		nvidia,memory-clients = <0xe>;
		dmas = <0x19 0x2 0x19 0x2>;
		dma-names = "rx", "tx";
		clocks = <0xd 0xd8 0xd 0x10d>;
		clock-names = "serial", "parent";
		resets = <0xd 0x70>;
		reset-names = "serial";
		status = "disabled";
		nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
		linux,phandle = <0x89>;
		phandle = <0x89>;
	};

```

after,

```auto
serial@c290000 {
		compatible = "nvidia,tegra186-hsuart";
		#stream-id-cells = <0x1>;
		reg = <0x0 0xc290000 0x0 0x40>;
		reg-shift = <0x2>;
		interrupts = <0x0 0x76 0x4>;
		nvidia,memory-clients = <0xe>;
		dmas = <0x19 0x2 0x19 0x2>;
		dma-names = "rx", "tx";
		clocks = <0xd 0xd8 0xd 0x10d>;
		clock-names = "serial", "parent";
		resets = <0xd 0x70>;
		reset-names = "serial";
		status = "okay";
		nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
		linux,phandle = <0x89>;
		phandle = <0x89>;
	};

```

---

<div class="post-metadata">

**Author:** ![JasonFan](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@JasonFan](https://forums.developer.nvidia.com/u/JasonFan)\
**Post date:** [December 13, 2017, 9:58am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/18 "2017-12-13T09:58:38Z")

</div>

Hi JerryChang,

I can make sure I compile the dtb and update correctly because I can add serial@3140000 successfully.

I found we have different source base.  
In my “kernel-dts/t18x-common-platforms/tegra186-quill-common.dtsi”, I don’t have serial@c290000{…

Previously, I only add the following codes in tegra186-quill-common.dtsi but got failure

```auto
serial@c290000{
   compatible = "nvidia, tegra186-hsuart"
   status = "okay"
}

```

Now I add all codes you show in previous post in tegra186-quill-common.dtsi but still got “serial-tegra c290000.serial: Failed to add uart port, err -22”

```auto
serial@c290000 {
		compatible = "nvidia,tegra186-hsuart";
		#stream-id-cells = <0x1>;
		reg = <0x0 0xc290000 0x0 0x40>;
		reg-shift = <0x2>;
		interrupts = <0x0 0x76 0x4>;
		nvidia,memory-clients = <0xe>;
		dmas = <0x19 0x2 0x19 0x2>;
		dma-names = "rx", "tx";
		clocks = <0xd 0xd8 0xd 0x10d>;
		clock-names = "serial", "parent";
		resets = <0xd 0x70>;
		reset-names = "serial";
		status = "okay";
		nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
		linux,phandle = <0x89>;
		phandle = <0x89>;
	};

```

Is anything I miss or does nVidia has new release for TX2?

Thank you

---

<div class="post-metadata">

**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\
**Post date:** [December 14, 2017, 9:03am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/19 "2017-12-14T09:03:56Z")

</div>

hello JasonFan,

we’re able to reproduce the serial-tegra c290000.serial: Failed to add uart port, err -22 from our side.  
will look into this and get back to you.  
thanks

---

<div class="post-metadata">

**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\
**Post date:** [December 19, 2017, 2:48am UTC](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/20 "2017-12-19T02:48:36Z")

</div>

hello JasonFan,

confirmed we had fix “serial-tegra c290000.serial: Failed to add uart port, err -22” issue.  
the fix will be include in the next JetPack release.  
thanks

[Next page](https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572.md?page=2)
