How to enable UART7 (D8, D5) as normal UART like other UART (uartc@C280000)

Does the UART7 can use as a common serial port now ?

Yes, after change define in sources and change tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb in this place: (after decompiling)

serial {
port = <0xff>; #port = <0x7>;
has_input;
};

and load flash:
sudo ./flash.sh jetson-tx2 mmcblk0p1

UART7 work fine! Can check transmit:

echo “123456” > /dev/ttyTHS6

and recive:

cat -v < /dev/ttyTHS6

then type in terminal (I’m use Putty) any characters.

I’m use Tegra186_Linux_R28.2.1_aarch64

Hi ksv198:

 I still get some strange info when doing loop testing
OPTIONS: I18n                                                                
Compiled on Feb  7 2016, 13:35:57.                                           
Port /dev/ttyTHS6, 03:04:48                                                  
                                                                             
Press CTRL-A Z for help on special keys                                      
                                                                             
f                                                                            
error: line too long                                                         
command not found                                                            
]                                                                            
command not found                                                            
] ]                                     
error: line too long                    
command not found                       
] ]                                     
error: line too long                    
command not found                       
] ] 
error: line too long

Here is what I had done

1 First, I use

JetPack-L4T-3.3-linux-x64_b39.run

to flash a new image to the TX2 with official board;

2 Then, convert the DTB to DTS using dtc tool in Linux_for_Tegra with the dtb file

tegra186-quill-p3310-1000-c03-00-base.dtb

, modify the

serial@c290000 {
...
status = "okay";
};

Then rebuild the dtb file and flash to the TX2;

3 Third, to ensure the

kernel/kernel-4.4/drivers/tty/serial/serial-tegra.c

need change : #define TEGRA_UART_MAXIMUM 5
to: #define TEGRA_UART_MAXIMUM 7

I rebuild the kernel.

4 Last I find the ttyTHS6 in /dev/, I short circuit the UART4_RX and UART4_TX in the office board, and done test, but get wrong messages.

What other things I should do?

I recommend testing under gtkterm. An example command line for 115200 8N1 to ttyTHS6 on a TX2:

# Use "sudo" if your user isn't a member of group "dialout".
gtkterm -b 8 -t 1 -s 115200 -p /dev/ttyTHS6

Minicom was designed to initialize modems using the AT command set. Gtkterm is simpler if you aren’t using a modem.

The result is same as the minicom!!!

Hello!
I think you need disconnect uart7 from internal debugger.
See thread: https://devtalk.nvidia.com/default/topic/1028494/jetson-tx2/internal-tx2-traffic-on-uart7-/

You need decompile tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb and change this:

serial {
port = <0xff>; #port = <0x7>;
has_input;
};

then compile, run apply_binaries.sh and flash:

sudo ./flash.sh jetson-tx2 mmcblk0p1

Good luck!

1 Like

Yes, I make it, thanks!

I make it, thanks!

Hello JerryChang,
I used your setting of UART7 on my custom board. It didn’t work. There some error message will shown on console when booted. The kernel message as below:

[ 1.181133] OF: /serial@c290000: could not get #clock-cells for /cpus/l2-cache0
[ 1.188613] ERROR: could not get clock /serial@c290000:serial(0)
[ 1.194704] serial-tegra c290000.serial: Couldn’t get the clock

By the way, I used L4T 32.3.1.

hello williamho,

may I know what’s the modification you’d done, did you change the port properties as port = <0xff>;?

Hello JerryChang,
Thanks for your reply. My modifications are:

  1. Change the port properties as port = <0xff>; in {my_path}/Linux_for_Tegra/bootloader/t186ref/tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dts (decompile the tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb)

  2. Add the setting as below in {my_path}/hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-common.dtsi

    serial@c290000 {
            compatible = "nvidia,tegra186-hsuart";
            #stream-id-cells = <0x1>;
            reg = <0x0 0xc290000 0x0 0x40>;
            reg-shift = <0x2>;
            interrupts = <0x0 0x76 0x4>;
            nvidia,memory-clients = <0xe>;
            dmas = <0x19 0x2 0x19 0x2>;
            dma-names = "rx", "tx";
            clocks = <0xd 0xd8 0xd 0x10d>;
            clock-names = "serial", "parent";
            resets = <0xd 0x70>;
            reset-names = "serial";
            status = "okay";
            nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
            linux,phandle = <0x89>;
            phandle = <0x89>;
    };

Hi JerryChang
Do you have any suggestion regarding how to set the UART 7 alive? thx a lot.

hello williamho,

could you please share the details boot logs for reference,
thanks

Hi JerryChang,
This is my detail boot logs.
thanks

boot.log (21.8 KB)

Can you try with below serial node with exact values and add it to the hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-common.dtsi ?

serial@c290000 {
                compatible = "nvidia,tegra186-hsuart";
                iommus = <0x11 0x20>;
                reg = <0x0 0xc290000 0x0 0x40>;
                reg-shift = <0x2>;
                interrupts = <0x0 0x76 0x4>;
                nvidia,memory-clients = <0xe>;
                dmas = <0x25 0x2 0x25 0x2>;
                dma-names = "rx", "tx";
                clocks = <0x10 0xd8 0x10 0x10d>;
                clock-names = "serial", "parent";
                resets = <0x10 0x70>;
                reset-names = "serial";
                status = "okay";
                nvidia,tolerance-low-range = <0x0>;
                nvidia,tolerance-high-range = <0x4>;
                nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
                linux,phandle = <0x194>;
                phandle = <0x194>;
        };

And check it with BPMP dts change as mentioned in previous comments.

Hi JerryChang,
The UART7 can work fine after used the latest setting you provided. Thanks again.

hello williamho,

glad to know it works,
to help other rel-32 forum developer to find the solutions easier, could you please help to point-out which comment shows the instruction, or, you might share your steps in detail to make UART-7 works.
thanks

Hi JerryChang,
OK, no problem. This is my H/W & L4T information and the steps of enabling UART7 as below:

[Information]
H/W: TX2 SOM board (P3310) + custom CA board
L4T: 32.3.1
UART7: connected with GPS

[Steps]
1.Modify the BPMP dts
a.cd /{$path}/nvidia_sdk/JetPack_4.3_Linux_P3310/Linux_for_Tegra/bootloader/t186ref
b.dtc -I dtb -O dts tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb > tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dts
c.Modify area as below:

serial {
  port = <0xff>; #port = <0x7>;
  has_input;
};
d.dtc -I dts -O dtb tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dts > tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb

2.Modify the dts
a.cd /${path}/kernel/hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms
b.added area as below in tegra186-quill-common.dtsi

serial@c290000 {
  compatible = "nvidia,tegra186-hsuart";
  iommus = <0x11 0x20>;
  reg = <0x0 0xc290000 0x0 0x40>;
  reg-shift = <0x2>;
  interrupts = <0x0 0x76 0x4>;
  nvidia,memory-clients = <0xe>;
  dmas = <0x25 0x2 0x25 0x2>;
  dma-names = "rx", "tx";
  clocks = <0x10 0xd8 0x10 0x10d>;
  clock-names = "serial", "parent";
  resets = <0x10 0x70>;
   reset-names = "serial";
  status = "okay";
  nvidia,tolerance-low-range = <0x0>;
  nvidia,tolerance-high-range = <0x4>;
  nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
  linux,phandle = <0x194>;
  phandle = <0x194>;
};

3.Compile the dts (ready your compile environment)
make ARCH=arm64 O=TEGRA_KERNEL_OUT CROSS_COMPILE={CROSS_COMPILE} -j4 dtbs

4.Flash dtb
sudo ./flash.sh -r -k kernel-dtb jetson-tx2 mmcblk0p1

1 Like

did I miss something or did you forget to flash the bpmp device tree in this writeup?
Terry

does flashing the kernel-dtb also flash the bpmp dtb?
Terry