Edid from the device:
00 ff ff ff ff ff ff 00 4a 8b 54 4c 01 00 00 00
0c 11 01 03 81 46 27 78 8a a5 8e a6 54 4a 9c 26
12 45 46 af cf 00 95 00 95 0f 95 19 01 01 01 01
01 01 01 01 01 01 01 1d 00 72 51 d0 1e 20 6e 28
55 00 b9 88 21 00 00 1e 8c 0a d0 8a 20 e0 2d 10
10 3e 96 00 b9 88 21 00 00 18 00 00 00 fd 00 32
4b 18 3c 0b 00 0a 20 20 20 20 20 20 00 00 00 fc
00 33 32 56 33 48 2d 48 36 41 0a 20 20 20 01 29
02 03 21 71 4e 06 07 02 03 15 96 11 12 13 04 14
05 1f 90 23 09 07 07 83 01 00 00 65 03 0c 00 10
00 8c 0a d0 90 20 40 31 20 0c 40 55 00 b9 88 21
00 00 18 01 1d 80 18 71 1c 16 20 58 2c 25 00 b9
88 21 00 00 9e 01 1d 80 d0 72 1c 16 20 10 2c 25
80 b9 88 21 00 00 9e 01 1d 00 bc 52 d0 1e 20 b8
28 55 40 b9 88 21 00 00 1e 02 3a 80 d0 72 38 2d
40 10 2c 45 80 b9 88 21 00 00 1e 00 00 00 00 d0
It decodes to this:
Extracted contents:
header: 00 ff ff ff ff ff ff 00
serial number: 4a 8b 54 4c 01 00 00 00 0c 11
version: 01 03
basic params: 81 46 27 78 8a
chroma info: a5 8e a6 54 4a 9c 26 12 45 46
established: af cf 00
standard: 95 00 95 0f 95 19 01 01 01 01 01 01 01 01 01 01
descriptor 1: 01 1d 00 72 51 d0 1e 20 6e 28 55 00 b9 88 21 00 00 1e
descriptor 2: 8c 0a d0 8a 20 e0 2d 10 10 3e 96 00 b9 88 21 00 00 18
descriptor 3: 00 00 00 fd 00 32 4b 18 3c 0b 00 0a 20 20 20 20 20 20
descriptor 4: 00 00 00 fc 00 33 32 56 33 48 2d 48 36 41 0a 20 20 20
extensions: 01
checksum: 29
Manufacturer: RTK Model 4c54 Serial Number 1
Made week 12 of 2007
EDID version: 1.3
Digital display
DFP 1.x compatible TMDS
Maximum image size: 70 cm x 39 cm
Gamma: 2.20
DPMS levels: Standby
Supported color formats: RGB 4:4:4, YCrCb 4:2:2
First detailed timing is preferred timing
Established timings supported:
720x400@70Hz
640x480@60Hz
640x480@72Hz
640x480@75Hz
800x600@56Hz
800x600@60Hz
800x600@72Hz
800x600@75Hz
1024x768@60Hz
1024x768@70Hz
1024x768@75Hz
1280x1024@75Hz
Standard timings supported:
1440x900@60Hz
1440x900@75Hz
1440x900@85Hz
Detailed mode: Clock 74.250 MHz, 697 mm x 392 mm
1280 1390 1430 1650 hborder 0
720 725 730 750 vborder 0
+hsync +vsync
Detailed mode: Clock 27.000 MHz, 697 mm x 392 mm
720 736 798 858 hborder 0
480 489 495 525 vborder 0
-hsync -vsync
Monitor ranges (GTF): 50-75Hz V, 24-60kHz H, max dotclock 110MHz
Monitor name: 32V3H
Has 1 extension blocks
Checksum: 0x29 (valid)
EDID block does NOT conform to EDID 1.3!
Detailed block string not properly terminated
When I add the 1280x800 EDID to edid-generator, here’s what I get:
nvidia@tegra-ubuntu:~/edid-generator$ ls -l 1280x800.bin
-rw-rw-r-- 1 nvidia nvidia 134 May 4 00:11 1280x800.bin
nvidia@tegra-ubuntu:~/edid-generator$ edid-decode 1280x800.bin
Extracted contents:
header: 00 ff ff ff ff ff ff 00
serial number: 31 d8 00 00 00 00 00 00 00 00
version: 00 00
basic params: 05 16 01 03 6d
chroma info: 21 14 78 ea 5e c0 a4 59 4a 98
established: 25 20 50
standard: 54 0f 0f 0f 81 00 01 01 01 01 01 01 01 01 01 01
descriptor 1: 01 01 01 01 9e 20 00 00 00 90 51 20 1f 30 48 80 36 00
descriptor 2: 4d d0 10 00 00 1e 00 00 00 ff 00 4c 69 6e 75 78 20 23
descriptor 3: 30 0a 20 20 20 20 00 00 00 fd 00 3b 3d 30 32 09 00 0a
descriptor 4: 20 20 20 20 20 20 00 00 00 fc 00 31 32 38 30 78 38 30
extensions: 30
checksum: 0a
Manufacturer: LNX Model 0 Serial Number 0
EDID version: 0.0
Analog display, Input voltage level: 0.7/0.3 V
Sync: Composite Serration
Maximum image size: 22 cm x 1 cm
Gamma: 1.03
DPMS levels: Suspend Off
RGB color display
Default (sRGB) color space is primary color space
Supports GTF timings within operating range
Established timings supported:
640x480@60Hz
640x480@75Hz
800x600@60Hz
832x624@75Hz
Standard timings supported:
920x920@75Hz
368x368@75Hz
1280x1280@60Hz
Detailed mode: Clock 2.570 MHz, 1055 mm x 2096 mm
2305 2305 2961 5890 hborder 128
32 37 38 32 vborder 54
-hsync -vsync analog composite
Detailed mode: Clock 533.250 MHz, 1897 mm x 1390 mm
16 272 527 16 hborder 120
30 78 78 30 vborder 32
+hsync -vsync analog composite interleaved right even
Detailed mode: Clock 26.080 MHz, 829 mm x 560 mm
544 544 1565 576 hborder 9
32 64 112 32 vborder 0
+hsync -vsync bipolar analog composite
Detailed mode: Clock 82.240 MHz, 818 mm x 56 mm
544 544 1564 576 hborder 120
32 32 48 32 vborder 56
-hsync -vsync digital composite field sequential L/R
Has 48 extension blocks
Checksum: 0xa (should be 0x54)
EDID block does not conform at all!
Block has broken checksum
Bad year of manufacture
This is total nonsense! Presumably, the horrible hack piping macros through the assembler to generate binary layout files breaks with the ARM assembler instead of the presumed x86 assembler.
I’m this >< close to just writing my own EDID descriptor from scratch…
Unless there’s an edid generator that’s, like, not a total, utter hack, somewhere?