I am wondering how I can merge two 4-lanes (8 lanes) on the TX2 Developer Carrier Board for the 4K HDMI input (HDMI2CSI). I read the spec as well as technical reference. But I don’t know how to use CSIMUX or merge CSI lanes to set the registers on the board. Thanks.
may I know which JetPack release you’re currently working with.
you should check below kernel sources to parse 8-lane device tree settings and also the configuration.
<i>$l4t-r32.1/kernel_src/kernel/nvidia/drivers/media/platform/tegra/camera/vi/graph.c</i>
int tegra_vi_get_port_info(struct tegra_channel *chan, struct device_node *node, unsigned int index)
{...}
you might also check TC358840 bridge driver as below for more details.
thanks $l4t-r32.1/kernel_src/kernel/nvidia/drivers/media/i2c/tc358840.c
$l4t-r32.1/kernel_src/hardware/nvidia/platform/t18x/quill/kernel-dts/quill-modules/tegra186-camera-imx274.dtsi
you should define the 8-lane configuration in your sensor device tree.
kernel driver will parse the settings and choose gang mode to handle a 8-lane device.
thanks
Hi, JerryChang. Thanks.
Maybe the below code(tegra186-quill-p3310-1000-c03-00-base-hdmi2csi.dts) is what you mentioned.
Do I have to fix this code to adjust something like HDMI input sync?
please create a sensor device tree for your customize device.
please check tutorials page and refer to [V4L2 Sensor Driver Development Tutorial] for implementation hands-on video.
you may also refer to Sensor Driver Programming Guide for the details.
thanks