Hello,
Our device tree setting as following, and clock will separate to two parts.
I also use “nvidia,clock-always-on;” but not work.
spi0: spi@3210000 {
compatible = "nvidia,tegra186-spi";
reg = <0x0 0x03210000 0x0 0x10000>;
interrupts = <0 36 0x04>;
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
dma-coherent;
dmas = <&gpcdma 15>, <&gpcdma 15>;
dma-names = "rx", "tx";
spi-max-frequency = <65000000>;
nvidia,clk-parents = "pll_p", "clk_m";
clocks = <&bpmp_clks TEGRA194_CLK_SPI1>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_CLK_M>;
clock-names = "spi", "pll_p", "clk_m";
resets = <&bpmp_resets TEGRA194_RESET_SPI1>;
reset-names = "spi";
//status = "disabled";
status = "okay";
slb9670@0 {
compatible = "infineon,slb9670";
reg = <0>;// CE1
spi-max-frequency = <500000>;
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x1e>;
nvidia,cs-hold-clk-count = <0x1e>;
nvidia,rx-clk-tap-delay = <0x1f>;
nvidia,tx-clk-tap-delay = <0x1f>;
interrupt-parent = <&tegra_main_gpio>;
interrupts = <TEGRA194_MAIN_GPIO(P, 6) 0>;
status = "okay";
};
};
pinmux as fllowing
pinmux.0x0243d040 = 0x00000400; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000450; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000400; # spi1_mosi_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000400; # spi1_cs0_pz6: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d050 = 0x00000400; # spi1_cs1_pz7: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
How to modify non-continuous clock of spi to continuous clock on Xavier?
Thank you very much!