Due to not spare GPIO on our current board. I try to multiplex a unused low-speed IO as GPIO. But i don’t konw how to do this, coud help to provide some guidance? For example, can UART0_TXD/RXD been multiplexed as SPI ready signal? Any reference for this? Thanks!
may I know what’s your actual use-case?
you may also refer to pinmux spreadsheets for pin configurations and also having customization.
you may modify the UART0_RXD signaling as GPIO pin, (i.e. GPIO3_PX.05)
My use-case is i need a gpio to indicate external SPI master(NX as slave) that SOC is ready to receive new data, to avoid external device sending too fast to overwrite/loss packet. And from SPI driver code, seems has limit to this GPIO, like can’t sleep. So i want to know where could I get those IO description. Also the mapping about the pin name UART0_RXD with DTS format like “nvidia,gpio-slave-ready = <&gpio TEGRA_GPIO(K, 4) 0>; /PK4/”. Thanks!
According the spreadsheets, i still don’t fully understand the conversion rule. Could you shed more light? For example, is UART0_TXD equal to TEGRA_GPIO(X, 4)? And how do i know if it’s sleepable or not? Besides, seems the “gpio” Device Labels are written by software, if a GPIO didn’t label before(unused), how could i know it’s integer value? Thanks!
please check pinmux spreadsheets for the mappings of signal name and also ball name. you may check the board configuration files for confirmation,
taking uart2_tx_px4 as an example,
it use signaling (DT property), UART2_TX; there’s a GPIO pin after ‘p’, so it’s TEGRA194_MAIN_GPIO(X, 4),
pinmux.0x0243d070 = 0x00000400; # uart2_tx_px4: uartb, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
Xavier and Xavier NX is based-on tegra194 series.
you may check the header files for reference,
OK, I see. Great appreciate your detail introduction!