Thank you for reply. I checked out my schematic about my TPM slb9670, I’m sure our board is use CS0 to connect TPM , that’s why I don’t understand we use CS1 can work,but CS0 can’t.
@b-sathishkumar I ref this link(SPI TPM module support fail on jetpack 5.0.2/5.1 on jetson xavier agx - #18 by b-sathishkumar) about your device tree setting.
Can your explain how to use prod-setting? Does this part should I set as your device tree?
Below photo is my device tree:
@b-sathishkumar And one more question, did you apply this patch?
(spi: tegra: handle cs_change in modes sw_based_cs & cs_gpios · Seeed-Studio/seeed-linux-dtoverlays@1a5db1b · GitHub)