How to store double in GPU registers?

As we known, registers of GPU are 32-bit, but double is 64-bit.

How to store double value into GPU registers?
Are there two 32-bit registers are used to store a double value?

Yes. As you can easily verify by looking at disassembled machine code (use cuobjdump --dump-sass), instructions operating on double-precision register operands expect those operands to be located in “aligned” register pairs, i.e. each register pair comprises an even numbered register and the following odd-numbered register. Examples: R2 plus R3, R10 plus R11.