How to configure SPI1 as master ??
What does this mean “Can you specify the ask here”
Use the below pinmux for configuring SPI1 as master
./reg_dump -a 0x0243d018 -s 32 -w 0x440
./reg_dump -a 0x0243d040 -s 32 -w 0x440
./reg_dump -a 0x0243d028 -s 32 -w 0x440
./reg_dump -a 0x0243d008 -s 32 -w 0x448
./reg_dump -a 0x0243d038 -s 32 -w 0x448
Still having issues…
why ./reg_dump -a 0x0243d038 -s 32 -w 0x448
bit 3 is 1
bit 6 is 1 ??
root@user-desktop:/home/user# rmmod spi-nor.ko
root@user-desktop:/home/user# insmod /lib/modules/5.10.65-tegra/kernel/drivers/mtd/spi-nor/spi-nor.ko
[ 5131.394076] spi-nor spi0.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00
[ 5131.394641] spi-nor spi0.1: unrecognized JEDEC id bytes: 00 00 00 00 00 00
root@user-desktop:/home/user# dmesg
[ 5131.393058] [SPI_NOR_CORE]spi_nor_probe::
[ 5131.393065] [SPI_NOR_CORE]spi_nor_scan::
[ 5131.393066] [SPI_NOR_CORE]spi_nor_check::
[ 5131.393068] [SPI_NOR_CORE]spi_nor_get_flash_info::
[ 5131.393070] [SPI_NOR_CORE]spi_nor_match_id::
[ 5131.393073] [SPI_NOR_CORE]spi_nor_read_id::
[ 5131.393074] [SPI_NOR_CORE]spi_nor_read_id::spi_mem_exec_op
[ 5131.393095] [SPI_TEGRA114]tegra_spi_runtime_resume:
[ 5131.393560] [SPI_TEGRA114]tegra_spi_setup_transfer_one:
[ 5131.393569] spi-tegra114 3210000.spi: prod settings failed with error -19
[ 5131.393571] spi-tegra114 3210000.spi: The def 0x40c08000 and written 0x40e08807
[ 5131.394037] [SPI_TEGRA114]tegra_spi_setup_transfer_one:
[ 5131.394039] spi-tegra114 3210000.spi: The def 0x40c08000 and written 0x40e09027
[ 5131.394076] spi-nor spi0.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00
[ 5131.394086] [SPI_TEGRA114]tegra_spi_runtime_suspend:
[ 5131.394287] [SPI_NOR_CORE]spi_nor_probe::
[ 5131.394289] [SPI_NOR_CORE]spi_nor_scan::
[ 5131.394290] [SPI_NOR_CORE]spi_nor_check::
[ 5131.394291] [SPI_NOR_CORE]spi_nor_get_flash_info::
[ 5131.394292] [SPI_NOR_CORE]spi_nor_match_id::
[ 5131.394293] [SPI_NOR_CORE]spi_nor_read_id::
[ 5131.394294] [SPI_NOR_CORE]spi_nor_read_id::spi_mem_exec_op
[ 5131.394452] [SPI_TEGRA114]tegra_spi_runtime_resume:
[ 5131.394588] [SPI_TEGRA114]tegra_spi_setup_transfer_one:
[ 5131.394592] spi-tegra114 3210000.spi: prod settings failed with error -19
[ 5131.394593] spi-tegra114 3210000.spi: The def 0x40c08000 and written 0x44e08807
[ 5131.394609] [SPI_TEGRA114]tegra_spi_setup_transfer_one:
[ 5131.394610] spi-tegra114 3210000.spi: The def 0x40c08000 and written 0x44e09027
[ 5131.394641] spi-nor spi0.1: unrecognized JEDEC id bytes: 00 00 00 00 00 00
[ 5131.394645] [SPI_TEGRA114]tegra_spi_runtime_suspend:
The values suggested above are ideal values which should have worked. Can you try to add spidev instance under the spi1 and try to run the spidev test just to rule out its a pinmux issue?
I modify
bootloader/t186ref/BCT/tegra234-mb1-bct-pinmux-p3701-0000.dtsi
spi1_sck_pz3 {
nvidia,pins = "spi1_sck_pz3";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
//nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};
spi1_miso_pz4 {
nvidia,pins = "spi1_miso_pz4";
nvidia,function = "spi1"; //1:0 0 spi1
nvidia,pull = <TEGRA_PIN_PULL_NONE>; //3:2 0 none 1 down 2 up
nvidia,tristate = <TEGRA_PIN_DISABLE>; //4 0 pass 1 tristate
nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>; //5 0 disable 1 enable
nvidia,enable-input = <TEGRA_PIN_ENABLE>; //6 0 disable 1 enable
nvidia,lpdr = <TEGRA_PIN_DISABLE>; //7 0 disable 1 enable
};
spi1_mosi_pz5 {
nvidia,pins = "spi1_mosi_pz5";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};
//pinmux.0x0243d010 = 0x00000400;
spi1_cs0_pz6 {
nvidia,pins = "spi1_cs0_pz6";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};
spi1_cs1_pz7 {
nvidia,pins = "spi1_cs1_pz7";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};
root@user-desktop:/home/user# busybox devmem 0x0243d008 32
0x00000048
root@user-desktop:/home/user# busybox devmem 0x0243d018 32
0x00000040
root@user-desktop:/home/user# busybox devmem 0x0243d028 32
0x00001040
root@user-desktop:/home/user# busybox devmem 0x0243d038 32
0x00000048
root@user-desktop:/home/user# busybox devmem 0x0243d040 32
0x00000040
Use the below pinmux for configuring SPI1 as master
./reg_dump -a 0x0243d018 -s 32 -w 0x440
./reg_dump -a 0x0243d040 -s 32 -w 0x440
./reg_dump -a 0x0243d028 -s 32 -w 0x440
./reg_dump -a 0x0243d008 -s 32 -w 0x448
./reg_dump -a 0x0243d038 -s 32 -w 0x448
But your suggestion is as follows! Then how to set bit10 of REG such as 0x0243d038 in tegra234-mb1-bct-pinmux-p3701-0000.dtsi??
how to set bit10 of REG such as 0x0243d038 in tegra234-mb1-bct-pinmux-p3701-0000.dtsi??
You can check pinmux register in the Orin TRM and it will tell you the meaning of each bit.
Then you will know what to change in your dtsi file.
I want to change GPIO_SF_SEL bit …
but I don’t know how to set ???
No suitable struct member found
spi1_cs0_pz6 {
nvidia,pins = “spi1_cs0_pz6”;
nvidia,function = “spi1”;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};
Hi,
What is the current status ? so if you set the pinmux in the register, then you can make the SPI work?
Besides changing the pinmux dtsi, did you remember to remove the node from the gpio dtsi file?
If you don’t remove them, they will always be GPIO pin…
SPI seems to be controllable, but due to hardware problems, I will find other SPI devices to test, now to determine whether the spi pinmux settings can be set correctly
I use ORIN JetPack 5.0.1 , and did not modify any GPIO settings
tegra234-p3737-0000-a00.dtsi
spi@3210000{ /* SPI1 in 40 pin conn /
status = “okay”;
spi@0 { / chip select 0 /
compatible = “tegra-spidev”;
reg = <0x0>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
spi@1 { / chip select 1 */
compatible = “tegra-spidev”;
reg = <0x1>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
};
Then you need to check what I said when you worry about the pinmux issue…
I use ORIN SDK JetPack 5.0.1, and did not modify any GPIO settings,
SPI1 is also the default setting… So I don’t know which gpio dtsi you want me to change?
Is this your firs time configuring pinmux file ? It seems you have Xavier AGX and Xavier NX but you never try to configure pinmux by using the spreadsheet before?
There is always a GPIO related dts file generated when running pinmux spreadsheet… and that file is also under your Linux_for_Tegra/bootloader.
I remove tegra234-mb1-bct-gpio-p3701-0000.dtsi spi1 gpio setting …
pinmux can read the correct value!
root@user-desktop:/home/user# busybox devmem 0x0243d008 32
0x00000448
root@user-desktop:/home/user# busybox devmem 0x0243d018 32
0x00000440
root@user-desktop:/home/user# busybox devmem 0x0243d028 32
0x00001440
root@user-desktop:/home/user# busybox devmem 0x0243d038 32
0x00000448
root@user-desktop:/home/user# busybox devmem 0x0243d040 32
0x00000440
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